ZEN2044F Zenic, ZEN2044F Datasheet - Page 7

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ZEN2044F

Manufacturer Part Number
ZEN2044F
Description
33MHz Up/down Counter
Manufacturer
Zenic
Datasheet
www.DataSheet4U.com
4-1-2. Normal Addressing Mode(DRCTCE="0")
DRCTCE
the lower two bits(AD/CE1 and AD/CE0) specify the target channel.
In this mode, A pair of AD/CE3 and AD/CE2 is used as the chip enable input for the
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
AD/CE3
1
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
AD/CE2
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
AD/CE1
*
*
*
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
AD/CE0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
*
*
*
Table 3
C/D
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
*
*
*
- 7 -
RD
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
*
*
*
WR
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
*
*
*
Disable(data bus: High-impedance)
Disable(data bus: High-impedance)
Disable(data bus: High-impedance)
Read: latch register(ch.0)
Read: latch register(ch.1)
Read: latch register(ch.2)
Read: latch register(ch.3)
Write: data for registers(ch.0)
Write: data for registers(ch.1)
Write: data for registers(ch.2)
Write: data for registers(ch.3)
Read: status register(ch.0)
Read: status register(ch.1)
Read: status register(ch.2)
Read: status register(ch.3)
Write: command(ch.0)
Write: command(ch.1)
Write: command(ch.2)
Write: command(ch.3)
Function
(
Z2044G00 ZENIC INC.
ZEN2044F
ZEN2044F
)
and

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