NL6448BC33-46D NEC, NL6448BC33-46D Datasheet - Page 10

• Manufacturer Part Number: NL6448BC33-46D
• Description: TFT COLOR LCD MODULE
• Manufacturer: NEC

www.DataSheet4U.com
4.3 ELECTRICAL CHARACTERISTICS
4.3.1 Driving for LCD panel signal processing board
4.3.2 Working for backlight lamp
Note1: Checkered flag pattern [by EIAJ ED-2522]
Note1: The power supply voltage cycle between lamps should be kept on a same phase. "VS" and
Note2: The asymmetric ratio of working waveform for lamps (Power supply voltage peak ratio,
Note3: The lamp holder of this product contains two backlight lamps. The low voltage terminal of
Note4: In case "FO" is not the recommended value, beat noise may display on the screen, because
Input voltage for DPSR
Logic input voltage for
display signals
Power supply voltage
Power supply voltage
Power supply current
Power supply current
Oscillation frequency
"VBLH" are the voltage value between low voltage side (Cold) and high voltage side (Hot).
power supply current peak ratio and waveform space ratio) should be less than 5 % (See the
following figure.). If the waveform is asymmetric, DC (Direct current) element apply into
the lamp. In this case, a lamp lifetime may be shortened, because a distribution of a lamp
enclosure substance inclines toward one side between low voltage terminal (Cold terminal)
and high voltage terminal (Hot terminal).
both lamps is connected to one contact point. Also above power supply current specification
is one lamp duty. Therefore, this lamp holder becomes twice as many power supply current
as above value. The measurement for the power supply current value of one lamp should
measure to use between low voltage terminal (Cold terminal) and high voltage terminal (Hot
terminal) to each lamp.
of interference between "FO" and "1/th". Recommended value of "FO" is as following.
Starting voltage
signal
Pb
Pa
Pa: Supply voltage/current peak for positive, Pb: Supply voltage/current peak for negative
Sa: Waveform space for positive part, Sb: Waveform space for negative part
Parameter
Parameter
FO =
0
th: Horizontal synchronous cycle (See "4.9.4 Timing characteristics".)
n: Natural number (1, 2, 3 ⋅⋅⋅⋅⋅⋅⋅⋅)
Sa
1
4
×
High
High
Low
Low
th
1
DATA SHEET EN0546EJ5V0DS00
× (2n-1)
Symbol
Symbol
VDLH
VFDH
VBLH
VDLL
VFDL
VCC
ICC
IBL
VS
FO
Sb
25°C
25°C
25°C
25°C
0.7Vcc
0.7Vcc
0°C
Ta
Min.
3.0
4.7
0
0
-
-
1,100
Min.
850
2.0
50
280 Note1
200 Note1
-
Sa - Sb
Pa - Pb
Typ.
3.3
5.0
-
-
-
-
Sb
Pb
Typ.
520
5.0
54
-
-
× 100 ≤ 5 %
× 100 ≤ 5 %
0.3Vcc
0.3Vcc
Max.
400
280
Vcc
Vcc
3.6
5.3
Max.
5.5
58
-
-
-
NL6448BC33-46D
mArms
Vrms
Vrms
Vrms
Unit
Unit
kHz
mA
mA
V
V
V
V
V
V
(Ta = 25°C)
for 3V system
for 5V system
Note2, Note3
VCC = 3.3V
VCC = 5.0V
CMOS level
Note1,Note2
Remarks
Remarks
Note1
Note4
10