LTC1860 Linear Technology, LTC1860 Datasheet - Page 7

no-image

LTC1860

Manufacturer Part Number
LTC1860
Description
(LTC1860 / LTC1861) 12-/16-Bit 8-Channel 200ksps ADCs
Manufacturer
Linear Technology
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LTC1860
Manufacturer:
FUJITSU
Quantity:
80
Part Number:
LTC1860CMS8
Manufacturer:
LT
Quantity:
10 000
Part Number:
LTC1860CMS8#PBF
Manufacturer:
LINEAR/凌特
Quantity:
20 000
Part Number:
LTC1860CS8
Manufacturer:
LINEAR/凌特
Quantity:
20 000
Part Number:
LTC1860CS8#PBF
Manufacturer:
LINEAR/凌特
Quantity:
20 000
Part Number:
LTC1860HMS8
Manufacturer:
LT
Quantity:
10 000
Part Number:
LTC1860HMS8#PBF
Manufacturer:
LT/凌特
Quantity:
20 000
Part Number:
LTC1860IMS8
Manufacturer:
LT
Quantity:
10 000
Part Number:
LTC1860IMS8
Manufacturer:
LTNEAR
Quantity:
20 000
Part Number:
LTC1860IMS8#PBF/H
Manufacturer:
LT
Quantity:
40
LTC1861 (MSOP Package)
FUNCTIONAL BLOCK DIAGRA
CONV (Pin 1): Convert Input. A logic high on this input
starts the A/D conversion process. If the CONV input is left
high after the A/D conversion is finished, the part powers
down. A logic low on this input enables the SDO pin,
allowing the data to be shifted out.
CH0, CH1 (Pins 2, 3): Analog Inputs. These inputs must
be free of noise with respect to AGND.
AGND (Pin 4): Analog Ground. AGND should be tied
directly to an analog ground plane.
DGND (Pin 5): Digital Ground. DGND should be tied
directly to an analog ground plane.
SDI (Pin 6): Digital Data Input. The A/D configuration
word is shifted into this input.
SDO (Pin 7): Digital Data Output. The A/D conversion
result is shifted out of this output.
SCK (Pin 8): Shift Clock Input. This clock synchronizes the
serial data transfer.
V
free of noise and ripple by bypassing directly to the
analog ground plane.
V
fines the span of the A/D converter and must be kept free
of noise with respect to AGND.
PI FU CTIO S
CC
REF
U
U
(Pin 9): Positive Supply. This supply must be kept
(Pin 10): Reference Input. The reference input de-
U
U
U
(CH0)
(CH1)
IN
IN
+
PIN NAMES IN
PARENTHESES
REFER TO LTC1861
GND
CONVERT
CLK
W
+
SHUTDOWN
SAMPLING
BIAS AND
12-BIT
ADC
V CC
V REF
LTC1861 (SO-8 Package)
CONV (Pin 1): Convert Input. A logic high on this input
starts the A/D conversion process. If the CONV input is left
high after the A/D conversion is finished, the part powers
down. A logic low on this input enables the SDO pin,
allowing the data to be shifted out.
CH0, CH1 (Pins 2, 3): Analog Inputs. These inputs must
be free of noise with respect to GND.
GND (Pin 4): Analog Ground. GND should be tied directly
to an analog ground plane.
SDI (Pin 5): Digital Data Input. The A/D configuration
word is shifted into this input.
SDO (Pin 6): Digital Data Output. The A/D conversion
result is shifted out of this output.
SCK (Pin 7): Shift Clock Input. This clock synchronizes the
serial data transfer.
V
free of noise and ripple by bypassing directly to the
analog ground plane. V
CC
(Pin 8): Positive Supply. This supply must be kept
DATA IN
DATA OUT
CONV (SDI) SCK
12-BITS
SERIAL
PORT
REF
LTC1860/LTC1861
1860/61 BD
is tied internally to this pin.
SDO
18601f
7

Related parts for LTC1860