LTC2245 Linear Technology, LTC2245 Datasheet - Page 14

• Manufacturer Part Number: LTC2245
• Description: 10Msps Low Power 3V ADC
• Manufacturer: Linear Technology

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LTC2245
APPLICATIO S I FOR ATIO
DIGITAL OUTPUTS
Table 1 shows the relationship between the analog input
voltage, the digital data bits, and the overflow bit.
Table 1. Output Codes vs Input Voltage
Digital Output Buffers
Figure 9 shows an equivalent circuit for a single output
buffer. Each buffer is powered by OV
lated from the ADC power and ground. The additional
N-channel transistor in the output driver allows operation
down to low voltages. The internal resistor in series with
the output makes the output appear as 50Ω to external
circuitry and may eliminate the need for external damping
resistors.
14
>+1.000000V
<–1.000000V
LATCH
LTC2245
FROM
DATA
+0.999878V
+0.999756V
+0.000122V
–0.000122V
–0.000244V
–0.999878V
–1.000000V
0.000000V
OE
(2V Range)
A
IN
+
– A
PREDRIVER
LOGIC
IN
V
–
DD
Figure 9. Digital Output Buffer
OF
1
0
0
0
0
0
0
0
0
1
U
11 1111 1111 1111
11 1111 1111 1111
11 1111 1111 1110
10 0000 0000 0001
10 0000 0000 0000
01 1111 1111 1111
01 1111 1111 1110
00 0000 0000 0001
00 0000 0000 0000
00 0000 0000 0000
(Offset Binary)
U
D13 – D0
V
DD
W
OV
DD
DD
01 1111 1111 1111
01 1111 1111 1111
01 1111 1111 1110
00 0000 0000 0001
00 0000 0000 0000
11 1111 1111 1111
11 1111 1111 1110
10 0000 0000 0001
10 0000 0000 0000
10 0000 0000 0000
(2’s Complement)
and OGND, iso-
43Ω
2245 F09
D13 – D0
U
OV
OGND
DD
TYPICAL
DATA
OUTPUT
0.5V
TO 3.6V
0.1µF
As with all high speed/high resolution converters, the
digital output loading can affect the performance. The
digital outputs of the LTC2245 should drive a minimal
capacitive load to avoid possible interaction between the
digital outputs and sensitive input circuitry. The output
should be buffered with a device such as an ALVCH16373
CMOS latch. For full speed operation the capacitive load
should be kept under 10pF.
Lower OV
from the digital outputs.
Data Format
Using the MODE pin, the LTC2245 parallel digital output
can be selected for offset binary or 2’s complement
format. Connecting MODE to GND or 1/3V
binary output format. Connecting MODE to
2/3V
An external resistor divider can be used to set the 1/3V
or 2/3V
the MODE pin.
Table 2. MODE Pin Function
MODE Pin
0
1/3V
2/3V
V
Overflow Bit
When OF outputs a logic high the converter is either
overranged or underranged.
DD
DD
DD
DD
DD
or V
DD
logic values. Table 2 shows the logic states for
DD
voltages will also help reduce interference
2’s Complement
2’s Complement
Output Format
selects 2’s complement output format.
Offset Binary
Offset Binary
Cycle Stablizer
Clock Duty
DD
Off
Off
On
On
selects offset
2245fa
DD