LTC2245 Linear Technology, LTC2245 Datasheet - Page 7

• Manufacturer Part Number: LTC2245
• Description: 10Msps Low Power 3V ADC
• Manufacturer: Linear Technology

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PI FU CTIO S
A
A
REFH (Pins 3, 4): ADC High Reference. Short together and
bypass to pins 5, 6 with a 0.1µF ceramic chip capacitor as
close to the pin as possible. Also bypass to pins 5, 6 with
an additional 2.2µF ceramic chip capacitor and to ground
with a 1µF ceramic chip capacitor.
REFL (Pins 5, 6): ADC Low Reference. Short together and
bypass to pins 3, 4 with a 0.1µF ceramic chip capacitor as
close to the pin as possible. Also bypass to pins 3, 4 with
an additional 2.2µF ceramic chip capacitor and to ground
with a 1µF ceramic chip capacitor.
V
ceramic chip capacitors.
GND (Pin 8): ADC Power Ground.
CLK (Pin 9): Clock Input. The input sample starts on the
positive edge.
SHDN (Pin 10): Shutdown Mode Selection Pin. Connect-
ing SHDN to GND and OE to GND results in normal
operation with the outputs enabled. Connecting SHDN to
GND and OE to V
TYPICAL PERFOR A CE CHARACTERISTICS
IN
IN
DD
U
+ (Pin 1): Positive Differential Analog Input.
- (Pin 2): Negative Differential Analog Input.
(Pins 7, 32): 3V Supply. Bypass to GND with 0.1µF
U
DD
25
15
10
20
0
I
5MHz Sine Wave Input, –1dB
U
results in normal operation with the
VDD
2
vs Sample Rate,
SAMPLE RATE (Msps)
W
4
6
U
2V RANGE
1V RANGE
8
10
12
2245 G12
14
outputs at high impedance. Connecting SHDN to V
OE to GND results in nap mode with the outputs at high
impedance. Connecting SHDN to V
results in sleep mode with the outputs at high impedance.
OE (Pin 11): Output Enable Pin. Refer to SHDN pin
function.
D0 – D13 (Pins 12, 13, 14, 15, 16, 17, 18, 19, 22, 23, 24,
25, 26, 27): Digital Outputs. D13 is the MSB.
OGND (Pin 20): Output Driver Ground.
OV
Bypass to ground with 0.1µF ceramic chip capacitor.
OF (Pin 28): Over/Under Flow Output. High when an over
or under flow has occurred.
MODE (Pin 29): Output Format and Clock Duty Cycle
Stabilizer Selection Pin. Connecting MODE to GND selects
offset binary output format and turns the clock duty cycle
stabilizer off. 1/3 V
and turns the clock duty cycle stabilizer on. 2/3 V
2’s complement output format and turns the clock duty
cycle stabilizer on. V
format and turns the clock duty cycle stabilizer off.
DD
(Pin 21): Positive Supply for the Output Drivers.
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
0
I
Wave Input, –1dB, O
OVDD
2
vs Sample Rate, 5MHz Sine
SAMPLE RATE (Msps)
4
DD
DD
6
selects offset binary output format
selects 2’s complement output
8
VDD
10
= 1.8V
12
2245 G13
DD
14
LTC2245
and OE to V
DD
selects
DD
2245fa
7
and
DD