LTC2249 Linear Technology, LTC2249 Datasheet - Page 7

• Manufacturer Part Number: LTC2249
• Description: 80Msps Low Power 3V ADC
• Manufacturer: Linear Technology

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PI FU CTIO S
A
A
REFH (Pins 3, 4): ADC High Reference. Short together and
bypass to pins 5, 6 with a 0.1µF ceramic chip capacitor as
close to the pin as possible. Also bypass to pins 5, 6 with
an additional 2.2µF ceramic chip capacitor and to ground
with a 1µF ceramic chip capacitor.
REFL (Pins 5, 6): ADC Low Reference. Short together and
bypass to pins 3, 4 with a 0.1µF ceramic chip capacitor as
close to the pin as possible. Also bypass to pins 3, 4 with
TYPICAL PERFOR A CE CHARACTERISTICS
IN
IN
U
+ (Pin 1): Positive Differential Analog Input.
- (Pin 2): Negative Differential Analog Input.
U
40
20
85
80
75
70
65
60
50
80
70
60
50
30
10
55
0
–70
U
0
I
5MHz Sine Wave Input, –1dB
SNR vs Input Level,
f
VDD
IN
10
= 70MHz, 2V Range
–60
vs Sample Rate,
20 30
W
–50
SAMPLE RATE (Msps)
INPUT LEVEL (dBFS)
dBFS
dBc
2V RANGE
40
–40
U
50
1V RANGE
–30
60
–20
70
80
–10
90 100
2249 G15
2249 G13
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0
an additional 2.2µF ceramic chip capacitor and to ground
with a 1µF ceramic chip capacitor.
V
ceramic chip capacitors.
GND (Pin 8): ADC Power Ground.
CLK (Pin 9): Clock Input. The input sample starts on the
positive edge.
SHDN (Pin 10): Shutdown Mode Selection Pin. Connect-
ing SHDN to GND and OE to GND results in normal
DD
(Pins 7, 32): 3V Supply. Bypass to GND with 0.1µF
100
120
110
90
80
70
50
60
40
30
20
10
7
4
2
0
0
6
5
3
1
–80
0
I
Wave Input, –1dB, O
SFDR vs Input Level,
f
OVDD
IN
10
= 70MHz, 2V Range
20 30
vs Sample Rate, 5MHz Sine
–60
SAMPLE RATE (Msps)
dBFS
INPUT LEVEL (dBFS)
REFERENCE LINE
100dBc SFDR
dBc
40
–40
50
60
VDD
70
–20
= 1.8V
80
2249 G14
90 100
2249 G16
0
LTC2249
7
2249f