LTC2301 Linear Technology Corporation, LTC2301 Datasheet - Page 17

• Manufacturer Part Number: LTC2301
• Description: (LTC2301 / LTC2305) 12-Bit ADCs
• Manufacturer: Linear Technology Corporation

www.DataSheet4U.com
APPLICATIONS INFORMATION
Output Data Format
The output register contains the last conversion result.
After each conversion is completed, the device automati-
cally enters either nap or sleep mode depending on the
setting of the SLP bit (see Nap Mode and Sleep Mode
sections). When the LTC2301/LTC2305 is addressed for
a read operation, it acknowledges by pulling SDA low and
acts as a transmitter. The master/receiver can read up to
two bytes from the LTC2301/LTC2305. After a complete
read operation of 2 bytes, a Stop condition is needed to
initiate a new conversion. The device will NAK subsequent
read operations while a conversion is being performed.
The data output stream is 16 bits long and is shifted out
on the falling edges of SCL (see Figure 7a). The fi rst bit
is the MSB and the 12th bit is the LSB of the conversion
SDA
SCL
SDA
START BY
SCL
MASTER
START BY
MASTER
NOTE: S/D BIT IS A DON’T CARE (X) FOR THE LTC2301
A6
1
A6
1
A5
2
A5
2
A4
3
A4
3
Figure 7a. Timing Diagram for Reading from the LTC2301/LTC2305
ADDRESS FRAME
Figure 7b. Timing Diagram for Writing to the LTC2301/LTC2305
A3
4
ADDRESS FRAME
A3
4
A2
5
A2
5
A1
6
A1
6
(CONTINUED)
(CONTINUED)
A0
7
A0
7
R/W
8
SDA
R/W
SCL
8
ACK BY
9
ADC
ACK BY
• • •
• • •
ADC
9
B11 B10
B3
1
1
result. The remaining four bits are zero. Figures 13 and 14
are the transfer characteristics for the bipolar and unipolar
modes. Data is output on the SDA line in 2’s complement
format for bipolar readings and in straight binary for
unipolar readings.
Input Data Format
When the LTC2301/LTC2305 is addressed for a write
operation, it acknowledges by pulling SDA low during
the low period before the 9th cycle and acts as a receiver.
The master/transmitter can then send 1 byte to program
the device. The input byte consists of the 6-bit D
followed by two bits that are ignored by the ADC and are
considered don’t cares (X) (see Figure 7b). The input bits
are latched on the rising edge of SCL during the write
operation.
S/D
1
B2
2
2
LEAST SIGNIFICANT DATA BYTE
O/S
MOST SIGNIFICANT DATA BYTE
2
B9
B1
3
3
D
IN
X
3
WRITE 1 BYTE
READ 1 BYTE
WORD
B8
B0
READ 1 BYTE
4
4
X
4
B7
5
5
UNI
5
B6
6
6
LTC2301/LTC2305
SLP
6
B5
7
7
X
7
B4
8
8
X
8
MASTER
NAK BY
MASTER
ACK BY
9
9
ACK BY
9
ADC
• • •
• • •
23015 F07b
23015 F07a
CONVERSION
CONVERSION
INITIATED
BY MASTER
STOP BY
MASTER
INITIATED
STOP
IN
17
word
23015f