LTC3555 Linear Technology, LTC3555 Datasheet - Page 20

• Manufacturer Part Number: LTC3555
• Description: High Efficiency USB Power Manager + Triple Step-Down DC/DC
• Manufacturer: Linear Technology

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LTC3555
OPERATION
Table 2. I
20
Table 3. USB Current Limit Settings
Table 4. Switching Regulator Servo Voltage
Table 5. General Purpose Switching Regulator Modes
*SDA and SCL take on this context only when DV
A7
A3
A7
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
(I
(SDA)*
Switching Regulator 2
Voltage (See Table 4)
LIM1
B1
B6
0
0
1
1
0
0
1
1
A6
A2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
2
)
A6
C Serial Port Mapping
A5
A1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
A5
(I
(SCL)*
LIM0
B0
A4
A0
B5
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
)
A4
Switching Regulator 2 Servo Voltage
Switching Regulator 3 Servo Voltage
USB SETTING
1x Mode (USB 100mA Limit)
10x Mode (Wall 1A Limit)
Suspend
5x Mode (USB 500mA Limit)
Switching Regulator Mode
Pulse Skip
Forced Burst Mode Operation
LDO Mode
Burst Mode Operation
A3
Switching Regulator 3
Voltage (See Table 4)
A2
0.425V
0.450V
0.475V
0.500V
0.525V
0.550V
0.575V
0.600V
0.625V
0.650V
0.675V
0.700V
0.725V
0.750V
0.775V
0.800V
CC
= 0V.
A1
A0
Charger
Disable
Battery
B7
should then deliver the most signifi cant data byte. Again
the LTC3555 acknowledges and the cycle is repeated for
a total of one address byte and two data bytes. Each data
byte is transferred to an internal holding latch upon the
return of an Acknowledge. After both data bytes have been
transferred to the LTC3555, the master may terminate
the communication with a Stop condition. Alternatively, a
Repeat-Start condition can be initiated by the master and
another chip on the I
can continue indefi nitely and the LTC3555 will remember
the last input of valid data that it received. Once all chips on
the bus have been addressed and sent valid data, a global
Stop condition can be sent and the LTC3555 will update
its command latch with the data that it had received.
In certain circumstances the data on the I
become corrupted. In these cases the LTC3555 responds
appropriately by preserving only the last set of complete
data that it has received. For example, assume the LTC3555
has been successfully addressed and is receiving data
when a Stop condition mistakenly occurs. The LTC3555
will ignore this stop condition and will not respond until
a new Start condition, correct address, new set of data
and Stop condition are transmitted.
Likewise, with only one exception, if the LTC3555 was
previously addressed and sent valid data but not updated
with a Stop, it will respond to any Stop that appears on
the bus, independent of the number of Repeat-Starts that
have occurred. If a Repeat-Start is given and the LTC3555
successfully acknowledges its address and fi rst byte, it
will not respond to a Stop until both bytes of the new data
have been received and acknowledged.
Disabling the I
The I
pin. In this mode, control automatically passes to the in-
dividual logic input pins EN1, EN2, EN3, I
and SCL. Some functionality is not available in this mode
(See Table 5)
B6
Switching
Regulator
Modes
2
C serial port can be disabled by grounding the DV
B5
Regulator
Enable
2
B4
C Port
1
2
C bus can be addressed. This cycle
Regulator
Enable
B3
2
Regulator
Enable
B2
3
LIM0
Input Current
(See Table 3)
2
B1
, I
C bus may
LIM1
Limit
, SDA
B0
3555f
CC