S29GL128P SPANSION, S29GL128P Datasheet - Page 49

• Manufacturer Part Number: S29GL128P
• Description: Page Mode Flash Memory
• Manufacturer: SPANSION

11. Electrical Specifications
11.1
November 21, 2006 S29GL-P_00_A3
Absolute Maximum Ratings
Note
Base = Base Address.
Notes
1. Minimum DC voltage on input or I/Os is –0.5 V. During voltage transitions, inputs or I/Os may undershoot V
2. Minimum DC input voltage on pins A9 and ACC is -0.5V. During voltage transitions, A9 and ACC may overshoot V
3. No more than one output may be shorted to ground at a time. Duration of the short circuit should not be greater than one second.
4. Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only;
Description
Storage Temperature, Plastic Packages
Ambient Temperature with Power Applied
Voltage with Respect to Ground
Output Short Circuit Current (Note 3)
/* Example: SecSi Sector Exit Command */
to 20 ns. See
V
of up to 20 ns. See
ns.
functional operation of the device at these or any other conditions above those indicated in the operational sections of this data sheet is not
implied. Exposure of the device to absolute maximum rating conditions for extended periods may affect device reliability.
D a t a
CC
*( (UINT16 *)base_addr + 0x555 ) = 0x00AA;
*( (UINT16 *)base_addr + 0x2AA ) = 0x0055;
*( (UINT16 *)base_addr + 0x555 ) = 0x0090;
*( (UINT16 *)base_addr + 0x000 ) = 0x0000;
+ 2.0 V for periods up to 20 ns. See
Unlock Cycle 1
Unlock Cycle 2
Exit Cycle 3
Exit Cycle 4
Figure
S h e e t
Cycle
Figure
11.1. Maximum DC voltage on input or I/Os is V
11.1. Maximum DC voltage on pins A9 and ACC is +12.5 V, which may overshoot to 14.0 V for periods up to 20
+0 .8 V
( A d v a n c e
–0 .5 V
–2 .0 V
Figure 11.1 Maximum Negative Overshoot Waveform
S29GL-P MirrorBit
Figure
Table 10.4 Secured Silicon Sector Exit
(LLD Function = lld_SecSiSectorExitCmd)
Operation
11.2.
Write
Write
Write
Write
All Inputs and I/Os except as noted below
(Note 1)
V
V
A9 and ACC (Note 2)
CC
IO
I n f o r m a t i o n )
20 ns
(Note 1)
TM
Flash Family
/* write unlock cycle 1
/* write unlock cycle 2
/* write SecSi Sector Exit cycle 3 */
/* write SecSi Sector Exit cycle 4 */
CC
Byte Address
Base + AAAh
Base + AAAh
Base + AAAh
20 n s
Base + 555h
+ 0.5 V. During voltage transitions inputs or I/Os may overshoot to
20 ns
Word Address
Base + 2AAh
Base + 555h
Base + 555h
Base + 000h
SS
–0.5 V to V
–0.5 V to +12.5 V
to –2.0 V for periods of up
–65°C to +150°C
–65°C to +125°C
–0.5 V to +4.0 V
–0.5V to +4.0V
*/
*/
SS
200 mA
Rating
to –2.0 V for periods
CC
00AAh
0055h
0090h
0000h
Data
+ 0.5 V
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