MBM29DL324TD Fujitsu Media Devices, MBM29DL324TD Datasheet - Page 60

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MBM29DL324TD

Manufacturer Part Number
MBM29DL324TD
Description
(MBM29DL32xBD) 32M (4M X 8/2M X 16) BIT Dual Operation
Manufacturer
Fujitsu Media Devices
Datasheet

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MBM29DL32XTD/BD
-80/90/12
COMMAND DEFINITIONS
Device operations are selected by writing specific address and data sequences into the command register.
Writing incorrect address and data values or writing them in the improper sequence will reset the devices to the
read mode. Some commands are required Bank Address (BA) input. When command sequences are inputed
to bank being read, the commands have priority than reading. Table 12 defines the valid register command
sequences. Note that the Erase Suspend (B0H) and Erase Resume (30H) commands are valid only while the
Sector Erase operation is in progress. Also the Program Suspend (B0H) and Program Resume (30H) commands
are valid only while the Program operation is in progress. Moreover both Read/Reset commands are functionally
equivalent, resetting the device to the read mode. Please note that commands are always written at DQ
to DQ
0
7
and DQ
to DQ
bits are ignored.
8
15
• Read/Reset Command
In order to return from Autoselect mode or Exceeded Timing Limits (DQ
= 1) to Read/Reset mode, the Read/
5
Reset operation is initiated by writing the Read/Reset command sequence into the command register.
Microprocessor read cycles retrieve array data from the memory. The devices remain enabled for reads until the
command register contents are altered.
The devices will automatically power-up in the Read/Reset state. In this case, a command sequence is not
required to read data. Standard microprocessor read cycles will retrieve array data. This default value ensures
that no spurious alteration of the memory content occurs during the power transition. Refer to the AC Read
Characteristics and Waveforms for the specific timing parameters.
• Autoselect Command
Flash memories are intended for use in applications where the local CPU alters memory contents. As such,
manufacture and device codes must be accessible while the devices reside in the target system. PROM
programmers typically access the signature codes by raising A
to a high voltage. However, multiplexing high
9
voltage onto the address lines is not generally desired system design practice.
The device contains an Autoselect command operation to supplement traditional PROM programming
methodology. The operation is initiated by writing the Autoselect command sequence into the command register.
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The Autoselect command sequence is initiated by first writing two unlock cycles. This is followed by a third write
cycle that contains the bank address (BA) and the Autoselect command. Then the manufacture and device
codes can be read from the bank, and an actual data of memory cell can be read from the another bank.
Following the command write, a read cycle from address (BA)00H retrieves the manufacture code of 04H. A
read cycle from address (BA)01H for 16((BA)02H for 8) returns the device code (MBM29DL321TD = 59H and
MBM29DL321BD = 5AH for 8 mode; MBM29DL321TD = 2259H and MBM29DL321BD = 225AH for 16 mode).
(MBM29DL322TD = 55H and MBM29DL322BD = 56H for 8 mode; MBM29DL322TD = 2255H and
MBM29DL322BD = 2256H for 16 mode). (MBM29DL323TD = 50H and MBM29DL323BD = 53H for 8 mode;
MBM29DL323TD = 2250H and MBM29DL323BD = 2253H for 16 mode). (MBM29DL324TD = 5CH and
MBM29DL324BD = 5FH for 8 mode; MBM29DL324TD = 225CH and MBM29DL324BD = 225FH for 16 mode).
(See Tables 11.1 to 11.8.)
All manufacturer and device codes will exhibit odd parity with DQ
defined as the parity bit. Sector state (protection
7
or unprotection) will be informed by address (BA)02H for 16 ((BA)04H for 8). Scanning the sector group
addresses (A
, A
, A
, A
, A
, A
, A
, A
, and A
) while (A
, A
, A
) = (0, 1, 0) will produce a logical “1” at
20
19
18
17
16
15
14
13
12
6
1
0
device output DQ
for a protected sector group. The programming verification should be performed by verify
0
sector group protection on the protected sector. (See Tables 8 and 9.)
60

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