MBM29DL400BC Fujitsu Media Devices, MBM29DL400BC Datasheet - Page 10

• Manufacturer Part Number: MBM29DL400BC
• Description: 4M (512K X 8/256K X 16) BIT
• Manufacturer: Fujitsu Media Devices

10
MBM29DL400TC
Simultaneous Operation
Read Mode
Standby Mode
MBM29DL400TC/BC have feature, which is capability of reading data from one bank of memory while a program
or erase operation is in progress in the other bank of memory (simultaneous operation), in addition to the
conventional features (read, program, erase, erase-suspend read, and erase-suspend program). The bank
selection can be selected by bank address (A
The MBM29DL400TC/BC have two banks which contain Bank 1 (16KB, 32KB, 8KB, 8KB, 8KB, 8KB, 32KB, and
16KB) and Bank 2 (64KB
The simultaneous operation can not execute multi-function mode in the same bank. Table 4 shows combination
to be possible for simultaneous operation.
*: An erase operation may also be supended to read from or program to a sector not being erased.
The MBM29DL400TC/BC have two control functions which must be satisfied in order to obtain data at the outputs.
CE is the power control and should be used for a device selection. OE is the output control and should be used
to gate data to the output pins if a device is selected.
Address access time (t
access time (t
enable access time is the delay from the falling edge of OE to valid data at the output pins. (Assuming the
addresses have been stable for at least t
power-up, it is necessary to input hardware reset or to change CE pin from “H” or “L”
There are two ways to implement the standby mode on the MBM29DL400TC/BC devices, one using both the
CE and RESET pins; the other via the RESET pin only.
When using both pins, a CMOS standby mode is achieved with CE and RESET inputs both held at V
Under this condition the current consumed is less than 5 A max. During Embedded Algorithm operation, V
active current (I
of these standby modes.
When using the RESET pin only, a CMOS standby mode is achieved with RESET input held at V
= “H” or “L”). Under this condition the current is consumed is less than 5 A max. Once the RESET pin is taken
high, the device requires t
In the standby mode the outputs are in the high impedance state, independent of the OE input.
FUNCTIONAL DESCRIPTION
Case
1
2
3
4
5
6
7
CE
CC2
) is the delay from stable addresses and stable CE to valid data at the output pins. The output
) is required even CE = “H”. The device can be read with standard access time (t
ACC
RH
) is equal to the delay from stable addresses to valid output data. The chip enable
six sectors).
of wake up time before outputs are valid for read access.
-55/-70/-90/-12
Autoselect mode
Bank 1 Status
Program mode
Table 4
Erase mode *
Read mode
Read mode
Read mode
Read mode
ACC
-t
OE
Simultaneous Operation
16
time.) When reading out a data without changing addresses after
, A
17
/MBM29DL400BC
) with zero latency.
Autoselect mode
Bank 2 Status
Program mode
Erase mode *
Read mode
Read mode
Read mode
Read mode
-55/-70/-90/-12
SS
CE
) from either
± 0.3 V (CE
CC
± 0.3 V.
CC