MX25L6402A Macronix International, MX25L6402A Datasheet - Page 17

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MX25L6402A

Manufacturer Part Number
MX25L6402A
Description
64M-BIT [x 1] CMOS SERIAL eLite FlashTM MEMORY
Manufacturer
Macronix International
Datasheet
MX25L6402A
READ ARRAY TIMING WAVEFORM (Parallel)
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NOTES:
1. 1st Byte='52h'
2. 2nd Byte=Address 1(AD1), A17=BIT 0, A18=BIT1, A19=BIT2, A20=BIT3, A21=BIT4, A22=BIT5.
3. 3rd Byte=Address 2(AD2), A9=BIT0, A10=BIT1,......A16=BIT7.
4. 4th Byte=Address 3(AD3), A7=BIT0, A8=BIT1.
5. 5th Byte=Byte Address(BA), A0=BIT0, A1=BIT1,......A6=BIT6.
6. 6th-9th Bytes for SI ==> Dummy Bytes (Don't care).
7. From Byte 10, SO Would Output Array Data.
8. Under parallel mode, the fastest access clock freq. will be changed to 1.25MHz(SCLK pin clock freq.).
9. To read array in parallel mode requires a parallel mode command (55H) before the read command.
Once in the parallel mode, eLite Flash
TM
Memory will not exit parallel mode until power-off.
P/N: PM1040
REV. 1.0, SEP. 29, 2004
17

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