fs3861 Fortune Semiconductor Corporation, fs3861 Datasheet - Page 20

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fs3861

Manufacturer Part Number
fs3861
Description
Intelligent Charger Management Controller
Manufacturer
Fortune Semiconductor Corporation
Datasheet
10.3.2.3. PWM (PDM) Voltage Generation
voltage level generated by the PWM function(pulse-width-modulation, or called pulse-density-modulation
abbreviated as PDM, since the scheme here is using the PDM instead of the PWM for generating pulse clock
signals), either selected by the hardware or software PWM module. The pulse density modulation clock enable bits
used at hardware PWM mode can be selected on the contents of the registers PWDH[7:0] and PWDL[7:0]
addressed at 0DH and 0EH, respectively.
sub-digit voltage level. For example, the bit PWM [14] = PWDH [6] =1’b1 refers to the clock-chained derived clock
to make the voltage-level divide-by-4, i.e., V
time. PDM[15] can generate the same 32,768 counts of positive pulse, (PDM[15] = 1 = PWM[15]) or 0 count
(PDM[15] = 0 = PWM[15]) as normal PWM[15] does in the 16-bit period of time. Also, PDM[14] can generate the
same 16,384 counts of positive pulse, (PDM[14] = 1 = PWM[14]) or 0 count (PDM[14] = 0 = PWM[14]) as PWM[14]
Fortune Semiconductor Corp.
The VPWM which is one of the comparator’s selected item by setting the CMPPSEL[4:0]==5’b00000 is the
PWDH
PWDL
PWM[15:0]={PWDH[7:0],PWDL[7:0]}
The PWM reference voltage is generated by using the derived divider chained-clocks for generation of the
From above, we know that PDM[15] represents the same energy weighting of PWM[15] in the 16-bit period of
PWM[15]
PWM[7]
bit7
bit7
: ADDRESS 0DH
: ADDRESS 0EH
PWM [14]
PWM [6]
bit6
bit6
PWM [13]
PWM [5]
bit5
bit5
CC
PWM [12]
/ 2
PWM [4]
-2
bit4
bit4
= V
CC
20/34
/ 4. The following figure shows the PDM definition:
PWM [11]
PWM [3]
bit3
bit3
PWM [10]
PWM [2]
bit2
bit2
PWM [9]
PWM [1]
bit1
bit1
PWM [8]
PWM [0]
FS3861
bit0
bit0
Rev. 1.0

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