mtd8n06e Freescale Semiconductor, Inc, mtd8n06e Datasheet - Page 5

• Manufacturer Part Number: mtd8n06e
• Description: Tm Data Sheet Tmos E-fet.tm Power Field Effect Transistor Dpak For Surface Mount
• Manufacturer: Freescale Semiconductor, Inc

the maximum simultaneous drain–to–source voltage and
drain current that a transistor can handle safely when it is for-
ward biased. Curves are based upon maximum peak junc-
tion temperature and a case temperature (T C ) of 25°C. Peak
repetitive pulsed power limits are determined by using the
thermal response data in conjunction with the procedures
discussed in AN569, “Transient Thermal Resistance–Gener-
al Data and Its Use.”
verse any load line provided neither rated peak current (I DM )
nor rated voltage (V DSS ) is exceeded and the transition time
(t r ,t f ) do not exceed 10 s. In addition the total power aver-
aged over a complete switching cycle must not exceed
(T J(MAX) – T C )/(R JC ).
in switching circuits with unclamped inductive loads. For reli-
Motorola TMOS Power MOSFET Transistor Device Data
The Forward Biased Safe Operating Area curves define
Switching between the off–state and the on–state may tra-
A Power MOSFET designated E–FET can be safely used
12
10
8
6
4
2
0
0
Figure 8. Gate–To–Source and Drain–To–Source
Q 1
2
Q 3
Voltage versus Total Charge
4
Q T , TOTAL CHARGE (nC)
Q 2
6
Q T
DRAIN–TO–SOURCE DIODE CHARACTERISTICS
8
8
6
4
2
0
0.5
Figure 10. Diode Forward Voltage versus Current
10
V GS = 0 V
T J = 25°C
0.55
V GS
I D = 8 A
T J = 25°C
V DS
V SD , SOURCE–TO–DRAIN VOLTAGE (VOLTS)
SAFE OPERATING AREA
0.6
12
0.65
14
60
50
40
30
20
10
0
0.7
0.75
able operation, the stored energy from circuit inductance dis-
sipated in the transistor while in avalanche must be less than
the rated limit and adjusted for operating conditions differing
from those specified. Although industry practice is to rate in
terms of energy, avalanche energy capability is not a con-
stant. The energy rating decreases non–linearly with an in-
crease of peak current in avalanche and peak junction
temperature.
to–source avalanche at currents up to rated pulsed current
(I DM ), the energy rating is specified at rated continuous cur-
rent (I D ), in accordance with industry custom. The energy rat-
ing must be derated for temperature as shown in the
accompanying graph (Figure 12). Maximum energy at cur-
rents below rated continuous I D can safely be assumed to
equal the values indicated.
Although many E–FETs can withstand the stress of drain–
1000
100
0.8
10
1
1
0.85
V DD = 30 V
I D = 8 A
V GS = 10 V
T J = 25°C
Figure 9. Resistive Switching Time
0.9
Variation versus Gate Resistance
t d(on)
t d(off)
0.95
R G , GATE RESISTANCE (OHMS)
t r
t f
1
10
MTD8N06E
5
100