cy2sstu32866 SpectraLinear Inc, cy2sstu32866 Datasheet - Page 19

• Manufacturer Part Number: cy2sstu32866
• Description: 1.8v, 25-bit 1 1 Or 14-bit 1 2 Jedec-compliant Data Register With Parity
• Manufacturer: SpectraLinear Inc

Rev 1.0, November 25, 2006
AC Timing Specifications
T
T
T
T
S
dv/dt Δ
rPLH
rPHL
PLH
PHL
LR
Parameter
Propagation Delay from Low to High
Propagation Delay from Low to High
Propagation Delay from Low to High
Propagation Delay from High to Low
Slew Rate Rising
Slew Rate Falling
Delta between Rising/Falling Rates
I
DD
CK Inputs
tested with clock and data inputs held at V
LVCMOS
RESET
V
V
V
ID
IH
IL
I
Input
DD
(continued)
Description
= V
C
= 600mV
= V
R
L
L
includes probe and jig capacitance
REF
= 100Ω
REF
Test Point
Test Point
Figure 13. Test Load for Timing Measurements #1
- 250mV ( AC voltage levels) for differential inputs. V
+ 250mV (AC Voltage levels) for differential inputs. V
Figure 14. Active and Inactive Times
Figure 15. Pulse Duration
t
V
inact
10%
DD
/2
CK
CK
V
ICR
DUT
DD
or GND, and I
OUT
From CK, CK# crossing to
QERR#
RESET# LOW to QERR# HIGH
RESET# LOW to Q, PPO LOW
dv/dt_r (20 to 80%)
dv/dt_f (20 to 80%)
t
w
T
O
L
= 350ps, 50Ω
= 0mA
Conditions
t
act
V
DD
IL
IH
/2
= V
= V
C
90%
V
DD
ICR
L
DD
= 30pF
for LVCMOS inputs
for LVCMOS inputs.
0V
V
DD
V
ID
VDD
V
V
IH
IL
R
Test Point
R
L
L
= 1000Ω
= 1000Ω
CY2SSTU32866
Min.
1.2
1
1
1
–
3 (typical)
Max.
2.4
3
3
4
4
1
Page 19 of 24
V/ns
V/ns
V/ns
Unit
ns
ns
ns
ns