ds2431pt-r Maxim Integrated Products, Inc., ds2431pt-r Datasheet - Page 3

• Manufacturer Part Number: ds2431pt-r
• Description: Ds2431 1024-bit 1-wire Eeprom
• Manufacturer: Maxim Integrated Products, Inc.

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1)
PIN DESCRIPTION
t
t
t
t
t
Intentional change, longer recovery time requirement due to modified 1-Wire front end.
SLOT
RSTL
PDH
PDL
W0L
PARAMETER
NAME
(incl. t
GND
N.C.
I/O
EP
Specifications at T
System requirement.
Maximum allowable pullup resistance is a function of the number of 1-Wire devices in the system and 1-Wire recovery times. The
specified value here applies to systems with only one device and with the minimum 1-Wire recovery times. For more heavily
loaded systems, an active pullup such as that found in the DS2482-x00, DS2480B, or DS2490 may be required.
Maximum value represents the internal parasite capacitance when V
data line, 2.5µs after V
Guaranteed by design, characterization and/or simulation only. Not production tested.
V
capacitive loading on IO. Lower V
and V
Voltage below which, during a falling edge on IO, a logic 0 is detected.
The voltage on IO needs to be less or equal to V
Voltage above which, during a rising edge on IO, a logic 1 is detected.
After V
The I-V characteristic is linear for voltages less than 1V.
Applies to a single device attached to a 1-Wire line.
The earliest recognition of a negative edge is possible at t
Defines maximum possible bit rate. Equal to t
Interval after t
is t
Highlighted numbers are NOT in compliance with legacy 1-Wire product standards. See comparison table below.
ε in Figure 11 represents the time required for the pullup circuitry to pull the voltage on IO up from V
duration for the master to pull the line low is t
δ in Figure 11 represents the time required for the pullup circuitry to pull the voltage on IO up from V
of the bus master. The actual maximum duration for the master to pull the line low is t
Current drawn from IO during the EEPROM programming interval. The pullup circuit on IO during the programming interval
should be such that the voltage at IO is greater than or equal to Vpup(min). If Vpup in the system is close to Vpup(min) then a low
impedance bypass of Rpup which can be activated during programming may need to be added.
Interval begins t
sequence. Interval ends once the device's self-timed EEPROM programming cycle is complete and the current drawn by the
device has returned from I
t
Write-cycle endurance is degraded as T
Not 100% production-tested; guaranteed by reliability monitor sampling.
Data retention is degraded as T
Guaranteed by 100% production test at elevated temperature for a shorter time; equivalence of this production test to data sheet
limit at operating temperature range is established by reliability testing.
EEPROM writes may become non-functional after the data retention time is exceeded. Long-time storage at elevated
temperatures is not recommended; the device may lose its write capability after 10 years at 125°C or 40 years at 85°C.
PROG
REC
TL
PDH(max)
, V
)
TH
HY
for units branded version ‘A1’ is 12.5ms.
TH
, and V
.
is crossed during a rising edge on IO, the voltage on IO has to drop by at least V
; maximum limit is t
1-Wire Bus Interface. Open drain, requires external pullup resistor.
Ground Reference
TDFN package only: Exposed Paddle. Solder evenly to the board’s ground plane
for proper operation. See
Not Connected
RSTL
HY
STANDARD SPEED
REHmax
480µs
61µs
15µs
60µs
60µs
MIN
are a function of the internal supply voltage which is itself a function of V
during which a bus master is guaranteed to sample a logic-0 on IO if there is a DS2431 present. Minimum limit
A
= -40°C are guaranteed by design only and not production-tested.
after the trailing rising edge on IO for the last timeslot of the E/S byte for a valid Copy Scratchpad
PUP
has been applied the parasite capacitance will not affect normal communications.
PROG
PDH(min)
(undef.)
(undef.)
to I
LEGACY VALUES
240µs
120µs
A
MAX
60µs
increases.
PUP
L
.
+ t
, higher R
PDL(min)
A
increases.
Application Note 3273
.
OVERDRIVE SPEED
W1Lmax
W0L(min)
PUP
48µs
MIN
t
7µs
2µs
8µs
6µs
PROG
IL(MAX)
, shorter t
+ t
+ t
F
for units branded version ‘A2’ and later is 10ms.
at all times the master is driving IO to a logic-0 level.
3 of 24
FUNCTION
- ε and t
REC(min)
REH
REC
(undef.)
after V
MAX
80µs
24µs
16µs
.
, and heavier capacitive loading all lead to lower values of V
6µs
W0Lmax
TH
PUP
+ t
has been reached on the preceding rising edge.
for additional information.
F
is first applied. If a 2.2k Ω resistor is used to pull up the
- ε respectively.
STANDARD SPEED
65µs
480µs
15µs
60µs
60µs
MIN
1)
RLmax
DS2431: 1024-Bit, 1-Wire EEPROM
(undef.)
HY
640µs
PUP
240µs
120µs
+ t
DS2431 VALUES
MAX
60µs
to be detected as logic '0'.
F
, R
.
PUP
IL
IL
, 1-Wire timing, and
to V
to the input high threshold
OVERDRIVE SPEED
TH
8µs
48µs
MIN
2µs
8µs
6µs
. The actual maximum
1)
(undef.)
15.5µs
MAX
80µs
24µs
6µs
TL
, V
TH
,