ds2152 Maxim Integrated Products, Inc., ds2152 Datasheet - Page 60

• Manufacturer Part Number: ds2152
• Description: Ds2152 Enhanced T1 Single Chip Transceiver
• Manufacturer: Maxim Integrated Products, Inc.

12.1.6 HDLC/BOC Register Description
FDLC: FDL CONTROL REGISTER (Address = 00 Hex)
(MSB)
RBR
SYMBOL
TCRCD
TEOM
TABT
TZSD
RHR
RBR
THR
TFS
RHR
POSITION
FDLC.7
FDLC.6
FDLC.5
FDLC.4
FDLC.3
FDLC.2
FDLC.1
FDLC.0
TFS
NAME AND DESCRIPTION
Receive BOC Reset. A 0 to 1 transition will reset the BOC
circuitry. Must be cleared and set again for a subsequent reset.
Receive HDLC Reset. A 0 to 1 transition will reset the HDLC
controller. Must be cleared and set again for a subsequent reset.
Transmit Flag/Idle Select.
0 = 7Eh
1 = FFh
Transmit HDLC Reset. A 0 to 1 transition will reset both the
HDLC controller and the transmit BOC circuitry. Must be
cleared and set again for a subsequent reset.
Transmit Abort. A 0 to 1 transition will cause the FIFO
contents to be dumped and one FEh abort to be sent followed by
7Eh or FFh flags/idle until a new packet is initiated by writing
new data into the FIFO. Must be cleared and set again for a
subsequent abort to be sent.
Transmit End of Message. Should be set to a 1 just before the
last data byte of a HDLC packet is written into the transmit
FIFO at TFFR. This bit will be cleared by the HDLC controller
when the last byte has been transmitted.
Transmit 0 Stuffer Defeat. Overrides internal enable.
0 = enable the 0 stuffer (normal operation)
1 = disable the 0 stuffer
Transmit CRC Defeat.
0 = enable CRC generation (normal operation)
1 = disable CRC generation
THR
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TABT
TEOM
TZSD
TCRCF
(LSB)