ds2152 Maxim Integrated Products, Inc., ds2152 Datasheet - Page 63

• Manufacturer Part Number: ds2152
• Description: Ds2152 Enhanced T1 Single Chip Transceiver
• Manufacturer: Maxim Integrated Products, Inc.

RPRM: RECEIVE RPM REGISTER (Address = 03 Hex)
Note: The RABT, RCRCE, ROVR, and RVM bits are latched and will be cleared when read.
(MSB)
RABT
SYMBOL
REMPTY
RCRCE
CBYTE
OBYTE
ROVR
RABT
RVM
POK
RCRCE
POSITION
RPRM.7
RPRM.6
RPRM.5
RPRM.4
RPRM.3
RPRM.2
RPRM.1
RPRM.0
ROVR
NAME AND DESCRIPTION
Abort Sequence Detected. Set whenever the HDLC controller
sees seven or more 1s in a row.
CRC Error. Set when the CRC checksum is in error.
Overrun. Set when the HDLC controller has attempted to write
a byte into an already full receive FIFO.
Valid Message. Set when the HDLC controller has detected and
checked a complete HDLC packet.
Empty. A real-time bit that is set high when the receive FIFO is
empty.
Packet OK. Set when the byte available for reading in the
receive FIFO at RFDL is the last byte of a valid message (and
hence no abort was seen, no overrun occurred, and the CRC was
correct).
Closing Byte. Set when the byte available for reading in the
receive FIFO at RFDL is the last byte of a message (whether the
message was valid or not).
Opening Byte. Set when the byte available for reading in the
receive FIFO at RFDL is the first byte of a message.
RVM
63 of 97
REMPTY
POK
CBYTE
OBYTE
(LSB)