upd78f0148m1gka1-9eu Renesas Electronics Corporation., upd78f0148m1gka1-9eu Datasheet - Page 232

no-image

upd78f0148m1gka1-9eu

Manufacturer Part Number
upd78f0148m1gka1-9eu
Description
8-bit Single-chip Microcontrollers
Manufacturer
Renesas Electronics Corporation.
Datasheet
9.4.2
during timer operation is prohibited.
during timer operation is possible.
CMP0n register match after the timer count is started. TOHn output becomes inactive when 8-bit timer counter Hn
and the CMP1n register match.
(1) Usage
232
TMHMDn
In PWM output mode, a pulse with an arbitrary duty and arbitrary cycle can be output.
8-bit timer compare register 0n (CMP0n) controls the cycle of timer output (TOHn). Rewriting the CMP0n register
8-bit timer compare register 1n (CMP1n) controls the duty of timer output (TOHn). Rewriting the CMP1n register
The operation in PWM output mode is as follows.
TOHn output becomes active and 8-bit timer counter Hn is cleared to 0 when 8-bit timer counter Hn and the
<1> Set each register.
In PWM output mode, a pulse for which an arbitrary duty and arbitrary cycle can be set is output.
<2> The count operation starts when TMHEn = 1.
<3> The CMP0n register is the compare register that is to be compared first after counter operation is enabled.
Operation as PWM output mode
(i) Setting timer H mode register n (TMHMDn)
(ii) Setting CMP0n register
(iii) Setting CMP1n register
When the values of 8-bit timer counter Hn and the CMP0n register match, 8-bit timer counter Hn is cleared,
an interrupt request signal (INTTMHn) is generated, and TOHn output becomes active. At the same time,
the compare register to be compared with 8-bit timer counter Hn is changed from the CMP0n register to the
CMP1n register.
TMHEn
0
• Compare value (N): Cycle setting
• Compare value (M): Duty setting
Remarks 1. n = 0, 1
CKSn2
0/1
2. 00H ≤ CMP1n (M) < CMP0n (N) ≤ FFH
CKSn1
Figure 9-11. Register Setting in PWM Output Mode
0/1
CHAPTER 9 8-BIT TIMERS H0 AND H1
CKSn0
0/1
User’s Manual U15947EJ3V1UD
TMMDn1
1
TMMDn0 TOLEVn
0
0/1
TOENn
1
Timer output enabled
Timer output level inversion setting
PWM output mode selection
Count clock (f
Count operation stopped
CNT
) selection

Related parts for upd78f0148m1gka1-9eu