mrf89xa Microchip Technology Inc., mrf89xa Datasheet - Page 43

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mrf89xa

Manufacturer Part Number
mrf89xa
Description
Ultra-low Power, Integrated Ism Band Sub-ghz Transceiver
Manufacturer
Microchip Technology Inc.
Datasheet

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REGISTER 2-15:
© 2010 Microchip Technology Inc.
bit 1
bit 0
Note 1: Setting this bit to ‘0’ disables the RSSI IRQ source. It can be left enabled at any time, and the user can
choose to map this interrupt to IRQ0/IRQ1 or not.
LSTSPLL: Lock Status of PLL bit
1 = PLL locked (lock detected)
0 = PLL not locked
Writing a ‘1’ for this bit clears LSTSPLL.
LENPLL: Lock Enable of PLL bit
1 = PLL lock detect enabled (default)
0 = PLL lock detect disabled
The PLL lock detect flag is mapped to the PLOCK pin (pin 23), and pin 23 is a High-Z pin
FTPRIREG: FIFO TRANSMIT PLL AND RSSI INTERRUPT REQUEST
CONFIGURATION REGISTER (ADDRESS:0x0E) (POR:0x01) (CONTINUED)
Preliminary
MRF89XA
DS70622B-page 43

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