mrf89xa Microchip Technology Inc., mrf89xa Datasheet - Page 56
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mrf89xa
Manufacturer Part Number
mrf89xa
Description
Ultra-low Power, Integrated Ism Band Sub-ghz Transceiver
Manufacturer
Microchip Technology Inc.
Datasheet
1.MRF89XA.pdf
(142 pages)
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2.20.4
REGISTER 2-32:
DS70622B-page 56
MRF89XA
bit 7
R = Readable bit
-n = Value at POR
r = Reserved
bit 7
bit 6
bit 5-0
ACFCRC
R/W-0
FIFO CRC CONFIGURATION
REGISTER DETAILS
ACFCRC: Auto Clear FIFO CRC bit
This bit when enabled auto clears FIFO if CRC failed for the current packet.
1 = Disabled
0 = Enabled (default)
FRWAXS: FIFO Read/Write Access bit
This bit indicate the read/write access for FIFO in Stand-by mode.
1 = Read
0 = Write (default)
Reserved<5:0>: Reserved bits; do not use
00000 = Reserved (default)
FRWAXS
R/W-0
FCRCREG: FIFO CRC CONFIGURATION REGISTER
(ADDRESS:0xIE) (POR:0x00)
W = Writable bit
‘1’ = Bit is set
—
r
—
Preliminary
r
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
—
r
—
r
© 2010 Microchip Technology Inc.
x = Bit is unknown
—
r
—
r
bit 0