74LVC16374ADGG,118 NXP Semiconductors, 74LVC16374ADGG,118 Datasheet - Page 8

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74LVC16374ADGG,118

Manufacturer Part Number
74LVC16374ADGG,118
Description
IC 16BIT EDGE TRIG D FF 48TSSOP
Manufacturer
NXP Semiconductors
Series
74LVCr
Type
D-Type Busr
Datasheet

Specifications of 74LVC16374ADGG,118

Package / Case
48-TSSOP
Mounting Type
Surface Mount
Voltage - Supply
1.2 V ~ 3.6 V
Operating Temperature
-40°C ~ 125°C
Output Type
Tri-State Non Inverted
Function
Standard
Current - Output High, Low
24mA, 24mA
Number Of Elements
2
Number Of Bits Per Element
8
Delay Time - Propagation
7ns
Frequency - Clock
100MHz
Trigger Type
Positive Edge
Number Of Circuits
2
Logic Family
LVC
Logic Type
CMOS
Polarity
Non-Inverting
Input Type
Single-Ended
Propagation Delay Time
14 ns
High Level Output Current
- 24 mA
Supply Voltage (max)
3.6 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Supply Voltage (min)
1.2 V
Technology
CMOS
Number Of Bits
16
Number Of Elements
2
Clock-edge Trigger Type
Positive-Edge
Operating Supply Voltage (typ)
1.8/2.5/3.3V
Low Level Output Current
24mA
Operating Supply Voltage (min)
1.2V
Operating Supply Voltage (max)
3.6V
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
48
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
935235190118
NXP Semiconductors
Table 6.
At recommended operating conditions. Voltages are referenced to GND (ground = 0 V).
[1]
[2]
[3]
[4]
[5]
[6]
74LVC_LVCH16374A_7
Product data sheet
Symbol Parameter
V
I
I
I
I
ΔI
C
I
I
I
I
I
OZ
OFF
CC
BHL
BHH
BHLO
BHHO
OL
I
CC
All typical values are measured at V
The bus hold circuit is switched off when V
For non bus hold parts only (74LVC16374A).
Valid for data inputs only. Control inputs do not have a bus hold circuit.
The specified sustaining current at the data input holds the input below the specified V
The specified overdrive current at the data input forces the data input to the opposite logic input state.
LOW-level
output voltage
input leakage
current
OFF-state
output current
power-off
leakage current
supply current
additional
supply current
input
capacitance
bus hold LOW
current
bus hold HIGH
current
bus hold LOW
overdrive
current
bus hold HIGH
overdrive
current
Static characteristics
Conditions
V
V
V
V
V
V
V
V
per input pin;
V
V
V
V
V
V
V
V
I
CC
I
I
O
CC
CC
I
CC
I
CC
I
CC
CC
CC
CC
I
V
I
I
= V
= 5.5 V or GND
= V
= V
= V
= GND to V
O
O
O
= 5.5 V or GND;
CC
= 3.6 V;
= 0 V; V
= 3.6 V;
= 2.7 V to 3.6 V;
= 0 V to 3.6 V;
= 3.0 V; V
= 3.0 V; V
= 3.6 V
= 3.6 V
= 100 μA;
= 12 mA; V
= 24 mA; V
IH
IH
CC
CC
= 2.7 V to 3.6 V
…continued
or V
or V
CC
or GND; I
− 0.6 V; I
= 3.3 V and T
IL
IL
I
or V
; V
CC
I
All information provided in this document is subject to legal disclaimers.
I
I
> V
= 0.8 V
= 2.0 V
CC
CC
CC
O
O
CC
O
= 2.7 V
= 3.0 V
= 3.6 V;
= 5.5 V
= 0 A
= 0 A
allowing 5.5 V on the input pin.
Rev. 07 — 23 March 2010
amb
74LVC16374A; 74LVCH16374A
= 25 °C.
16-bit edge-triggered D-type flip-flop; 5 V tolerant; 3-state
[4][5]
[4][5]
[4][6]
[4][6]
[2]
[2]
[3]
−500
Min
−75
500
75
-
-
-
-
-
-
-
-
-
−40 °C to +85 °C
Typ
±0.1
±0.1
±0.1
0.1
5.0
5
-
-
-
-
-
-
-
[1]
I
level.
Max
0.55
±10
500
0.2
0.4
±5
±5
20
-
-
-
-
-
−40 °C to +125 °C
−500
Min
−60
500
60
-
-
-
-
-
-
-
-
-
© NXP B.V. 2010. All rights reserved.
5000
Max
±20
±20
±20
0.3
0.6
0.8
80
-
-
-
-
-
8 of 19
Unit
V
V
V
μA
μA
μA
μA
μA
pF
μA
μA
μA
μA

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