si5351 Silicon Laboratories, si5351 Datasheet - Page 15

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si5351

Manufacturer Part Number
si5351
Description
Si5350a Factory-programmable Cmos Clock Generator
Manufacturer
Silicon Laboratories
Datasheet

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Si5351A/B/C
6. External Component Recommendations
The Si5351 is a self-contained clock generator that requires very few external components. The following general
guidelines are recommended to ensure optimum performance. Refer to application note AN554 for additional
layout recommendations.
6.1. Power Supply Decoupling/Filtering
The Si5351 has built-in power supply filtering circuitry to help minimize the number of external components. All that
is recommended is one 0.1 µF decoupling capacitor per power supply pin. This capacitor should be mounted as
close to the VDD and VDDOx pins as possible without using vias.
6.2. Power Supply Sequencing
The VDD and VDDOx (i.e., VDDO0, VDDO1, VDDO2, VDDO3) power supply pins have been separated to allow
flexibility in output signal levels. It is important that power is applied to all supply pins (VDD, VDDOx)
simultaneously. Unused VDDOx pins should be tied to VDD.
6.3. External Crystal
The external crystal should be mounted as close to the pins as possible using short PCB traces. The XA and XB
traces should be kept away from other high-speed signal traces. See “AN551: Crystal Selection Guide” for more
details.
6.4. External Crystal Load Capacitors
The Si5351 provides the option of using internal and external crystal load capacitors. If external load capacitors are
used, they should be placed as close to the XA/XB pads as possible. See “AN554: Layout Recommendations” for
more details.
6.5. Unused Pins
Unused voltage control pin should be tied to GND.
Unused CLKIN pin should be tied to GND.
Unused XA/XB pins should be tied to GND.
Unused output pins (CLK0–CLK7) should be left floating.
Unused VDDOx pins should be tied to VDD.
Rev. 0.1
15

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