HEF4521BP,652 NXP Semiconductors, HEF4521BP,652 Datasheet

IC FREQ DIVIDER 24STG 16DIP

HEF4521BP,652

Manufacturer Part Number
HEF4521BP,652
Description
IC FREQ DIVIDER 24STG 16DIP
Manufacturer
NXP Semiconductors
Series
4000Br
Type
D-Type Busr
Datasheets

Specifications of HEF4521BP,652

Package / Case
16-DIP (0.300", 7.62mm)
Function
Master Reset
Output Type
Non-Inverted
Number Of Elements
1
Number Of Bits Per Element
24
Frequency - Clock
35MHz
Delay Time - Propagation
25ns
Trigger Type
Negative Edge
Mounting Type
Through Hole
Mounting Style
SMD/SMT
Dc
07+
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Voltage - Supply
-
Operating Temperature
-
Current - Output High, Low
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
933406750652
HEF4521BPN
HEF4521BPN
1. General description
2. Features
3. Applications
4. Ordering information
Table 1.
All types operate from 40 C to +85 C.
Type number
HEF4521BP
HEF4521BT
Ordering information
Package
Name
DIP16
SO16
The HEF4521B consists of a chain of 24 toggle flip-flops with an overriding asynchronous
master reset input (MR), and an input circuit that allows three modes of operation. The
single inverting stage (A2 to Y2) will function as: a crystal oscillator, an input buffer for an
external oscillator or in combination with A1 as an RC oscillator. The crystal oscillator
operates in Low-power mode when pins V
Each flip-flop divides the frequency of the previous flip-flop by two, consequently the
HEF4521B will count up to 2
transition of the clock (A2). The outputs from each of the last seven stages (2
available for additional flexibility.
It operates over a recommended V
(usually ground). Unused inputs must be connected to V
also suitable for use over the full industrial ( 40 C to +85 C) temperature range.
I
I
I
I
I
I
I
HEF4521B
24-stage frequency divider and oscillator
Rev. 05 — 5 November 2009
Low power crystal oscillator operation
Fully static operation
5 V, 10 V, and 15 V parametric ratings
Standardized symmetrical output characteristics
Operates across the full industrial temperature range 40 C to +85 C
Complies with JEDEC standard JESD 13-B
Industrial
Description
plastic dual in-line package; 16-leads (300 mil)
plastic small outline package; 16 leads; body width 3.9 mm
24
= 16777216. The counting advances on the HIGH-to-LOW
DD
power supply range of 3 V to 15 V referenced to V
SS1
and V
DD1
are supplied via external resistors.
DD
, V
SS
, or another input. It is
Product data sheet
Version
SOT38-4
SOT109-1
18
to 2
24
) are
SS

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HEF4521BP,652 Summary of contents

Page 1

HEF4521B 24-stage frequency divider and oscillator Rev. 05 — 5 November 2009 1. General description The HEF4521B consists of a chain of 24 toggle flip-flops with an overriding asynchronous master reset input (MR), and an input circuit that allows three ...

Page 2

... NXP Semiconductors 5. Functional diagram SS1 3 Fig 1. Functional diagram Fig 2. Schematic diagram of clock input circuitry HEF4521B_5 Product data sheet DD1 Q24 Q18 Q19 Q20 Q21 Q22 Q23 1 V DD1 A2 to FFs V SS1 Y2 Rev. 05 — 5 November 2009 HEF4521B 24-stage frequency divider and oscillator ...

Page 3

SS1 V DD1 Fig 3. Logic diagram ...

Page 4

... NXP Semiconductors 6. Pinning information 6.1 Pinning Fig 4. Pin configuration 6.2 Pin description Table 2. Pin description Symbol Pin SS1 V 5 DD1 Y1 A1 Q18 to Q24 10, 11, 12, 13, 14, 15 Count capacity Table 3. Count capacity Output Count capacity 18 Q18 2 19 Q19 2 20 Q20 2 21 ...

Page 5

... NXP Semiconductors 8. Functional Test A test function has been included to reduce the test time required to test all 24 counter stages. This test function divides the counter into three 8-stage sections by connecting SS1 parallel via A2 (connected to Y2). All flip-flops are now at a HIGH level. The counter is now returned to the normal 24-stage in series confi ...

Page 6

... NXP Semiconductors 10. Recommended operating conditions Table 6. Recommended operating conditions Symbol Parameter V supply voltage DD V input voltage I T ambient temperature amb t/ V input transition rise and fall rate 11. Static characteristics Table 7. Static characteristics unless otherwise specified Symbol Parameter V HIGH-level input voltage ...

Page 7

... NXP Semiconductors 12. Dynamic characteristics Table 8. Dynamic characteristics for test circuits see SS amb Symbol Parameter t HIGH to LOW PHL propagation delay t LOW to HIGH PLH propagation delay t transition time t t pulse width W t recovery time rec f maximum frequency max [1] The typical values of the propagation delay and transition times are calculated from the extrapolation formulas shown (C ...

Page 8

... NXP Semiconductors Table 9. Dynamic power dissipation P P can be calculated from the formulas shown Symbol Parameter dynamic power dissipation 13. Waveforms input input output Pulse widths, maximum frequency, recovery and transition times and propagation delays input PLH output propagation delays Y1 and propagation delays ...

Page 9

... NXP Semiconductors a. Input waveforms b. Test circuit Test data is given in Table Definitions for test circuit: Device Under Test (DUT Load capacitance including jig and probe capacitance Termination resistance should be equal to output impedance Z T Fig 6. Test circuit for switching times Table 10. Measurement points and test data ...

Page 10

... NXP Semiconductors 14. Application information (1) Optional for low power operation. Fig 7. Crystal oscillator circuit Table 11. Typical characteristics for crystal oscillator See Figure 7. Parameter Crystal characteristics Resonance frequency Crystal cut Equivalent resistance; R External resistor/capacitor values HEF4521B_5 Product data sheet HEF4521B 500 kHz circuit ...

Page 11

... NXP Semiconductors HEF4521B --------------------------------- - 2 Hz and max -------------------- - where maximum input voltage LOW; and IL(max input leakage current. LI Fig 8. RC oscillator circuit HEF4521B_5 Product data sheet (kHz) V DD1 Y1 Y2 Q18 Q24 V SS1 001aae714 2R , where: TC Fig 9. Rev. 05 — 5 November 2009 HEF4521B 24-stage frequency divider and oscillator ...

Page 12

... NXP Semiconductors R bias 560 0. input output kHz with v constant (see Fig 10. Test setup for measuring forward transconductance 75 gain ( typ Fig 12. Voltage gain function of supply O I voltage Fig 14. Test setup for measuring the HEF4521B_5 Product data sheet g (mA/V) 100 001aae820 Figure 11). ...

Page 13

... NXP Semiconductors 15. Package outline DIP16: plastic dual in-line package; 16 leads (300 mil pin 1 index 1 DIMENSIONS (inch dimensions are derived from the original mm dimensions UNIT max. min. max. mm 4.2 0.51 3.2 inches 0.17 0.02 0.13 Note 1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included. ...

Page 14

... NXP Semiconductors SO16: plastic small outline package; 16 leads; body width 3 pin 1 index 1 DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. 0.25 1.45 mm 1.75 0.25 0.10 1.25 0.010 0.057 inches 0.069 0.01 0.004 0.049 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. ...

Page 15

... NXP Semiconductors 16. Revision history Table 12. Revision history Document ID Release date HEF4521B_5 20091105 • Modifications: Section 2 “Features” • Section 10 “Recommended operating conditions” • Abbreviations section removed. HEF4521B_4 20090421 HEF4521B_CNV_3 19950101 HEF4521B_CNV_2 19950101 HEF4521B_5 Product data sheet 24-stage frequency divider and oscillator ...

Page 16

... Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...

Page 17

... NXP Semiconductors 19. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 4 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 5 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 6 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4 6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 7 Count capacity . . . . . . . . . . . . . . . . . . . . . . . . . . 4 8 Functional Test Limiting values Recommended operating conditions Static characteristics Dynamic characteristics . . . . . . . . . . . . . . . . . . 7 13 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 14 Application information ...

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