sc26c94 NXP Semiconductors, sc26c94 Datasheet - Page 24
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sc26c94
Manufacturer Part Number
sc26c94
Description
Quad Universal Asynchronous Receiver/transmitter Quart
Manufacturer
NXP Semiconductors
Datasheet
1.SC26C94.pdf
(33 pages)
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1. Parameters are valid over specified temperature range. See ordering information table for applicable temperature range and operating
Philips Semiconductors
AC ELECTRICAL CHARACTERISTICS
T
numbers apply to both ranges.
NOTES:
2. Timing is illustrated and referenced to the WRN and RDN inputs. The device may also be operated with CEN as a ‘strobing’ input. CEN and
3. The RDN signal must be negated for this time to guarantee that internal registers update before the next read.
1995 May 1
A
Quad universal asynchronous receiver/transmitter (QUART)
NO.
NO.
= 25 C; V
supply range.
RDN (also CEN and WRN) are ANDed internally. As a consequence the signal asserted last initiates the cycle; the signal negated first
terminates the cycle. Address is latched at leading edge of a read or write cycle.
10
1
2
3
4
5
6
7
8
9
A[5:0]
D[7:0]
WRN
CEN
RDN
FIGURE
FIGURE
CC
2
2
2
2
2
2
2
2
2
2
= 5V
A[5:0] Setup time to RDN WRN Low
A[5:0] Hold time from RDN WRN Low
CEN Setup time to RDN WRN Low
CEN Hold time from RDN WRN High
RDN WRN Pulse Width Low
D[7:0] Data Valid after CEN and RDN Low
D[7:0] Data Bus floating after RDN or CEN High
D[7:0] Data Bus Setup time before WRN or CEN High
D[7:0] Hold time after WRN or CEN High
Time between Reads and/or Writes
10%, unless otherwise specified. Limits shown as nn/nn refer to Commercial/Industrial temperature range. Single
1
3
2
Figure 2. A Read Cycle Followed by a Write Cycle without DACKN
6
5
CHARACTERISTIC
CHARACTERISTIC
1
READ CYCLE
2
3
2
4
7
24
10
1
2
110/115
WRITE CYCLE
Min
10
45
40
50
5
0
0
8
8
LIMITS
Typ
9
110/115
Max
Product specification
SC26C94
30
SD00164
UNIT
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns