isl3873b Intersil Corporation, isl3873b Datasheet - Page 3

• Manufacturer Part Number: isl3873b
• Description: Wireless Integrated Medium Access Controller With Baseband Processor
• Manufacturer: Intersil Corporation

ISL3873B Signal Descriptions
HA0-9
HCE1-
HCE2-
HD0-15
HINPACK-
HIORD-
HIOWR-
HRDY/HIREQ-
HOE-
HREG-
RESET
HSTSCHG-
HWAIT-
HWE-
USB+
USB-
USB_DETECT
MUBE- / MA0 /
MWEH-
MA1-18
PL4-MA19
MLBE-
MOE-
MWE- / MWEL-
RAMCS-
NVCS-
MD0-7
MD8-15
PIN NAME
PIN NAME
PIN NAME
5V tol, CMOS, Input, 50K Pull Down
5V tol, CMOS, Input, 50K Pull Up
5V tol, CMOS, Input, 50K Pull Up
5V tol, BiDir, 2mA, 50K Pull Down
CMOS Output, 2mA
5V tol, CMOS, Input, 50K Pull Up
5V tol, CMOS, Input, 50K Pull Up
CMOS Output, 4mA
5V tol, CMOS, Input, 50K Pull Up
5V tol, CMOS, Input, 50K Pull Up
5V tol, CMOS, ST Input, 50K Pull Up
CMOS Output, 4mA
CMOS Output, 4mA
5V tol, CMOS Input, 50K Pull Up
CMOS BiDir, 2mA, (Also USB Transceiver)
CMOS BiDir, 2mA, (Also USB Transceiver)
Input, 5V tolerant, pull-down
CMOS TS Output, 2mA
CMOS TS Output, 2mA
CMOS BiDir, 2mA
CMOS TS Output, 2mA, 50K Pull Up
CMOS TS Output, 2mA
CMOS TS Output, 2mA
CMOS TS Output, 2mA
CMOS TS Output, 2mA
5V tol, CMOS, BiDir, 2mA, 100K Pull Up
5V tol, CMOS, BiDir, 2mA
50K Pull-Downs on MD15, MD14, MD13, MD11,
MD10, MD09
50K Pull-Ups MD12, MD08
3
PIN I/O TYPE
PIN I/O TYPE
PIN I/O TYPE
USB INTERFACE PINS
Memory Interface Pins
Host Interface Pins
ISL3873B
Host PC Card Address Input, Bits 0 to 9
Host PC Card Select, Low Byte
Host PC Card Select, High Byte
Host PC Card Data Bus, Bit 0 to 15
Host PC Card I/O Decode Confirmation
Host PC Card I/O Space Read Strobe
Host PC Card I/O Space Write Strobe
Host PC Card interrupt Request (I/O Mode), also used as PC Card
Host PC Card Memory Attribute Space Output Enable
Host PC Card Attribute Space Select
Host Wait, asserted to indicate data transfer not complete and to force
MBUS Address Bit 19
MBUS Lower Byte Enable, or I/O as PM2
Ready (Memory Mode) output which is asserted to indicate card
initialization is complete
Hardware Reset. Self-asserted by internal pull-up at power-on. Clock
signal CLKIN or XTALIN must be available before negation of Reset.
Value of MD[15..0] copied to MDIR[15..0] and various control register
bits on the first MCLK following release of Reset
Host PC Card Status Change
force host bus wait states
Host PC Card Memory Attribute Space Write Enable
USB, MBUS Address Bit 20, or I/O as PL5
USB, MBUS Address Bit 21, or I/O as PL6
Sense USB VBUS to indicate cable attachment
MBUS Upper Byte Enable for x16 Memory; MBUS Address Bit 0 (byte)
for x8 Memory; High Byte Write Enable for 2 x8 Memories
MBUS Address Bits 1 to 18
Memory Output Enable
Low (or only) Byte Memory Write Enable
RAM Select
NV Memory Select
MBUS Low Data Byte, Bits 0 to 7
MBUS High Data Byte, Bits 8 to 15
Default power up states are defined by pull-up and pull-down internal
resistors as shown. Device defaults to external EEPROM for boot up
mode. Using external 10K resistors, configure these pins according to
Table 4 to change power-up configuration
DESCRIPTION
DESCRIPTION
DESCRIPTION