isl3873b Intersil Corporation, isl3873b Datasheet - Page 37
isl3873b
Manufacturer Part Number
isl3873b
Description
Wireless Integrated Medium Access Controller With Baseband Processor
Manufacturer
Intersil Corporation
Datasheet
1.ISL3873B.pdf
(42 pages)
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Bits 7:4
Bits 3:0
Bits 7:5
Bits 4:0
Bits 7:6
Bit 5:0
Bits 7:1
Bit 0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit 7
Mid saturation attenuation (0-30 range). Note: mid saturation attenuation is programmed as this value times 2. The mid and
low attenuator steps will occur if the number of I and Q saturations are greater than the mid and low saturation counts set by
CR16.
low saturation attenuation (0-15 range).
AGC Saturation Block Level, 1xx.x, range 4.0 to 7.5 dB. Disable saturation attenuation step if less than or equal to this level.
AGC lock window negative side. (0-15.5 range) (this is the outer lock window) Note: set as a positive number, logic will convert
to negative.
R/W but not currently used internally, should be set to zero to ensure compatibility with future revisions.
Carrier Sense 2 (CS2) scale factor (0-7.875 range) (000000 - 111111).
Sets the transmit power. 7 bits to DAC input, -64 to 63 range.
Note: rising edge of TXPE is required for value in CR 31 to be applied to DAC.
R/W but not currently used internally, should be set to zero to ensure compatibility with future revisions.
Selection bit for DAC input test mode 7.
0 = Barker.
1 = Low rate I/Q samples.
force high rate mode.
0 = normal.
1 = force high rate mode.
Length Field counter.
0 = disable (802.11 systems, length field is in microseconds, not bits).
1 = enabled - counts bits, resets RX.
Tristate test bus and enable inputs.
0 = Normal.
1 = enable inputs on test bus.
Disable spread sequence for 1 and 2Mbps.
0 = Normal.
1 = disabled.
Disable scrambler.
0 = normal scrambler operation.
1 = scrambler disabled (taps set to 0).
PN generator enable (RX 44MHz clock). For factory test only.
0 = not enabled.
1 = enabled. Bit must first be written to a ‘0’ before a ‘1’ to initialize logic.
PN generator enable (RX 22MHz clock). For factory test only.
0 = not enabled.
1 = enabled. Bit must first be written to a ‘0’ before a ‘1’ to initialize logic.
Coherent AGC disable.
0 = normal, enabled.
1 = disable.
CONFIGURATION REGISTER ADDRESS 29 (3Ah) R/W AGC LOCK WINDOW NEGATIVE SIDE
CONFIGURATION REGISTER ADDRESS 30 (3Ch) R/W CARRIER SENSE 2 SCALE FACTOR
CONFIGURATION REGISTER ADDRESS 28 (38h) R/W AGC LOW SAT ATTENUATOR
37
CONFIGURATION REGISTER 31 ADDRESS (3Eh) TX POWER CONTROL
CONFIGURATION REGISTER 32 ADDRESS (40h) R/W TEST MODES 1
CONFIGURATION REGISTER ADDRESS 33 (42h) R/W TEST MODES 2
ISL3873B