isl62883c Intersil Corporation, isl62883c Datasheet - Page 24

• Manufacturer Part Number: isl62883c
• Description: Multiphase Pwm Regulator For Imvp-6.5? Mobile Cpus And Gpus
• Manufacturer: Intersil Corporation

There are many sets of parameters that can properly
temperature-compensate the DCR change. Since the
NTC network and the R
divider, V
voltage. It is recommended to have a higher ratio of V
to the inductor DCR voltage, so the droop circuit has
higher signal level to work with.
A typical set of parameters that provide good
temperature compensation are: R
R
(ERT-J1VR103J). The NTC network parameters may
need to be fine tuned on actual boards. One can apply
full load DC current and record the output voltage
reading immediately; then record the output voltage
reading again when the board has reached the thermal
steady state. A good NTC network can limit the output
voltage drift to within 2mV. It is recommended to follow
the Intersil evaluation board layout and current-sensing
network parameters to minimize engineering time.
V
controller to achieve good transient response. Transfer
function A
needs to match w
all frequencies. By forcing w
for the solution, Equation 24 gives Cn value.
For example, given N = 3, R
R
L = 0.36µH, Equation 24 gives C
Assuming the compensator design is correct, Figure 18
shows the expected load transient response waveforms
if C
has a square change, the output voltage V
a square response.
If C
accurately represent real-time I
transient response. Figure 19 shows the load transient
response when C
upon load insertion and may create a system failure.
Figure 20 shows the transient response when C
large. V
There will be excessive overshoot if load insertion occurs
during this time, which may potentially hurt the CPU
reliability.
p
Cn
C
ntcs
n
= 11kΩ, R
n
n
(s) also needs to represent real-time I
=
is correctly selected. When the load current I
value is too large or too small, V
= 2.61kΩ, R
-------------------------------------------------------------- -
R
------------------------------------------
R
core
ntcnet
ntcnet
cn
cs
is always a fraction of the inductor DCR
is sluggish in drooping to its final value.
(s) has a pole w
ntcs
×
+
R
-------------- -
R
-------------- -
L
sum
sum
N
N
n
ntc
= 2.61kΩ and R
L
is too small. V
and w
×
= 10kΩ, DCR = 0.88mΩ and
DCR
sum
24
sns
resistors form a voltage
sum
L
sns
so A
equal to w
o
n
= 3.65kΩ, R
(s) and will worsen the
core
and a zero w
ntc
sum
= 0.406µF.
cs
(s) is unity gain at
will sag excessively
= 10kΩ
Cn
= 3.65kΩ,
(s) will not
sns
core
o
and solving
p
(s) for the
L
= 11kΩ,
. One
n
also has
(EQ. 24)
is too
ISL62883C
core
cn
FIGURE 18. DESIRED LOAD TRANSIENT RESPONSE
FIGURE 19. LOAD TRANSIENT RESPONSE WHEN C
FIGURE 20. LOAD TRANSIENT RESPONSE WHEN C
FIGURE 21. OUTPUT VOLTAGE RING BACK PROBLEM
WAVEFORMS
IS TOO SMALL
IS TOO LARGE
BACK
RING
o i
L i
o i
o i
V o
V o
o i
V o
V o
March 18, 2010
FN7557.1
n
n