isl62883c Intersil Corporation, isl62883c Datasheet - Page 29

• Manufacturer Part Number: isl62883c
• Description: Multiphase Pwm Regulator For Imvp-6.5? Mobile Cpus And Gpus
• Manufacturer: Intersil Corporation

FIGURE 28. OPTIONAL SLEW RATE COMPENSATION
Optional Slew Rate Compensation Circuit
For 1-Tick VID Transition
During a large VID transition, the DAC steps through the
VIDs at a controlled slew rate. For example, the DAC
may change a tick (12.5mV) per 2.5µs per, controlling
output voltage V
Figure 28 shows the waveforms of 1-tick VID transition.
During 1-tick VID transition, the DAC output changes at
approximately 15mV/µs slew rate, but the DAC cannot
step through multiple VIDs to control the slew rate.
Instead, the control loop response speed determines
V
voltage slew rate. However, the controller senses the
inductor current increase during the up transition, as the
I
voltage V
Similar behavior occurs during the down transition.
droop_vid
core
slew rate. Ideally, V
COMP
Idroop_vid
core
VID<0:6>
waveform shows, and will droop the output
CIRCUIT FOR1-TICK VID TRANSITION
Vcore
INTERNAL
Vfb
Ivid
accordingly, making V
TO IC
E/A
core
slew rate at 5mV/µs.
FB
Σ
Idroop_vid
core
29
VDAC
Rvid Cvid
Rdroop
Ivid
will follow the FB pin
DAC
X 1
core
VIDs
RTN
VSS
slew rate slow.
OPTIONAL
VID<0:6>
VSSSENSE
Vcore
ISL62883C
To control V
one can add the R
cancels I
When V
induced I
where C
In the mean time, the R
domain expression is:
It is desired to let I
are:
and:
The result is expressed in Equation 47:
and:
For example: given LL = 1.9mΩ, R
C
15mV/µs, Equation 47 gives R
Equation 48 gives C
It’s recommended to select the calculated R
start with the calculated C
actual board to get the best performance.
During normal transient response, the FB pin voltage is
held constant, therefore is virtual ground in small signal
sense. The R
ground and the real ground, and hence has no effect on
transient response.
C
I
I
C
R
R
out
vid
droop
vid
vid
vid
vid
t ( )
= 1320µF, dV
×
×
=
=
t ( )
C
dV
------------
=
core
C
------------------------- -
R
dt
out
vid
R
droop_vid
C
out
droop
droop
fb
=
droop
vid
=
C
------------------------- -
=
core
is the total output capacitance.
×
increases, the time domain expression of the
R
out
vid
×
C
LL
C
------------------------- -
droop
R
dV
------------
out
change is
out
×
dt
droop
×
slew rate during 1-tick VID transition,
- C
LL
fb
.
×
dV
------------------ -
------------------ -
×
vid
core
dV
------------
×
vid
LL
vid
LL
dt
dt
vid
×
core
⎛
⎜
⎜
⎝
-C
fb
dV
------------------ -
1 e
(t) cancel I
×
/dt = 5mV/µs and dV
network is between the virtual
–
vid
= 350pF.
dt
dV
------------------ -
core
vid
------------------------------- -
R
dt
vid
core
branch, whose current I
vid
-C
×
vid
t –
⎛
⎜
⎜
⎝
×
value and tweak it on the
1 e
vid
C
–
vid
branch current I
droop_vid
= 2.37kΩ and
-------------------------- -
C
⎞
⎟
⎟
⎠
droop
out
t –
×
LL
= 2.37kΩ,
⎞
⎟
⎟
⎠
(t). So there
vid
fb
/dt =
March 18, 2010
value and
vid
(EQ. 43)
(EQ. 44)
(EQ. 45)
(EQ. 46)
(EQ. 47)
(EQ. 48)
FN7557.1
vid
time