isl6252a Intersil Corporation, isl6252a Datasheet - Page 16
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isl6252a
Manufacturer Part Number
isl6252a
Description
Highly Integrated Battery Charger Controller For Notebook Computers
Manufacturer
Intersil Corporation
Datasheet
1.ISL6252A.pdf
(24 pages)
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Quantity
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Part Number:
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The inductor ripple current ΔI is found from Equation 17:
where the maximum peak-to-peak ripple current is 30% of
the maximum charge current is used.
For V
f
the closest standard value gives L = 10µH. Ferrite cores are
often the best choice since they are optimized at 300kHz to
600kHz operation with low core loss. The core must be large
enough not to saturate at the peak inductor current I
Equation 18:
Inductor saturation can lead to cascade failures due to very
high currents. Conservative design limits the peak and RMS
current in the inductor to less than 90% of the rated
saturation current.
Cross over frequency is heavily dependant on the inductor
value. f
frequency and a conservative design has f
of the switching frequency. The highest f
control mode with the battery removed and may be
calculated (approximately) from Equation 19:
Output Capacitor Selection
The output capacitor in parallel with the battery is used to
absorb the high frequency switching ripple current and
smooth the output voltage. The RMS value of the output
ripple current I
where the duty cycle D is the ratio of the output voltage
(battery voltage) over the input voltage for continuous
conduction mode which is typical operation for the battery
charger. During the battery charge period, the output voltage
varies from its initial battery voltage to the rated battery
voltage. So, the duty cycle change can be in the range of
between 0.53 and 0.88 for the minimum battery voltage of
10V (2.5V/Cell) and the maximum battery voltage of 16.8V.
The maximum RMS value of the output ripple current occurs
at the duty cycle of 0.5 and is expressed as Equation 21:
For V
f
10F ceramic capacitor is a good choice to absorb this
current and also has very small size. Organic polymer
capacitors have high capacitance with small size and have a
significant equivalent series resistance (ESR). Although
I
I
f
I
I
s
s
RIPPLE
PEAK
CO
RMS
RMS
= 300kHz, the calculated inductance is 8.3µH. Choosing
= 300kHz, the maximum RMS current is 0.19A. A typical
=
IN,MAX
IN,MAX
=
=
5 11 R
------------------------------------------ -
=
CO
----------------------------------- D
-----------------------------------------
4
⋅
=
I
12 L F
⋅
L MAX
V
,
should be less than 20% of the switching
V
0.3 I ⋅
2π L
IN MAX
⋅
12 L f
⋅
IN MAX
= 19V, V
= 19V, VBAT = 16.8V, L = 10µH, and
,
⋅
rms
,
SENSE
⋅
⋅
L MAX
+
,
SW
⋅
1
-- -
2
is given by Equation 20:
SW
⋅
I
⋅
RIPPLE
BAT
⋅
(
1 D
= 16.8V, I
–
16
)
BAT,MAX
CO
CO
is in voltage
= 2.6A, and
less than 10%
ISL6252, ISL6252A
Peak
(EQ. 20)
(EQ. 17)
(EQ. 19)
(EQ. 21)
(EQ. 18)
in
ESR adds to ripple voltage, it also creates a high frequency
zero that helps the closed loop operation of the buck
regulator.
EMI considerations usually make it desirable to minimize
ripple current in the battery leads. Beads may be added in
series with the battery pack to increase the battery
impedance at 300kHz switching frequency. Switching ripple
current splits between the battery and the output capacitor
depending on the ESR of the output capacitor and battery
impedance. If the ESR of the output capacitor is 10mΩ and
battery impedance is raised to 2Ω with a bead, then only
0.5% of the ripple current will flow in the battery.
MOSFET Selection
The Notebook battery charger synchronous buck converter
has the input voltage from the AC adapter output. The
maximum AC adapter output voltage does not exceed 25V.
Therefore, 30V logic MOSFET should be used.
The high side MOSFET must be able to dissipate the
conduction losses plus the switching losses. For the battery
charger application, the input voltage of the synchronous
buck converter is equal to the AC adapter output voltage,
which is relatively constant. The maximum efficiency is
achieved by selecting a high side MOSFET that has the
conduction losses equal to the switching losses. Switching
losses in the low-side FET are very small. The choice of
low-side FET is a trade off between conduction losses
(r
the low-side FET is 2X the r
The LGATE gate driver can drive sufficient gate current to
switch most MOSFETs efficiently. However, some FETs may
exhibit cross conduction (or shoot through) due to current
injected into the drain-to-source parasitic capacitor (C
the high dV/dt rising edge at the phase node when the high-
side MOSFET turns on. Although LGATE sink current (1.8A
typical) is more than enough to switch the FET off quickly,
voltage drops across parasitic impedances between LGATE
and the MOSFET can allow the gate to rise during the fast
rising edge of voltage on the drain. MOSFETs with low
threshold voltage (<1.5V) and low ratio of C
high gate resistance (>4Ω) may be turned on for a few ns by
the high dV/dt (rising edge) on their drain. This can be
avoided with higher threshold voltage and C
Another way to avoid cross conduction is slowing the turn-on
speed of the high-side MOSFET by connecting a resistor
between the BOOT pin and the boot strap cap.
For the high-side MOSFET, the worst-case conduction
losses occur at the minimum input voltage as shown in
Equation 22:
The optimum efficiency occurs when the switching losses
equal the conduction losses. However, it is difficult to
P
DS(ON)
Q1 conduction
,
) and cost. A good rule of thumb for the r
=
V
--------------- - I
V
OUT
IN
⋅
BAT
DS(ON)
2
⋅
r
DS ON
(
of the high-side FET.
)
gs
gs
/C
/C
gd
gd
DS(ON)
(<5) and
July 19, 2007
ratio.
(EQ. 22)
gd
FN6498.1
) by
of