S25FL128P Meet Spansion Inc., S25FL128P Datasheet - Page 33
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S25FL128P
Manufacturer Part Number
S25FL128P
Description
128 Megabit Cmos 3.0 Volt Flash Memory With 104 Mhz Spi Serial Peripheral Interface Bus
Manufacturer
Meet Spansion Inc.
Datasheet
1.S25FL128P.pdf
(48 pages)
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11.10 Sector Erase (SE: 20h, D8h)
July 2, 2007 S25FL128P_00_04
The Sector Erase (SE) command sets all bits at all addresses within a specified sector to a logic 1. A WREN
command is required prior to writing the PP command.
The host system must drive CS# low, and then write the SE command plus three address bytes on SI. Any
address within the sector (see
driven low for the entire duration of the SE sequence. The command sequence is shown in
Table
The host system must drive CS# high after the device has latched the 8th bit of the SE command, otherwise
the device does not execute the command. The SE operation begins as soon as CS# is driven high. The
device internally controls the timing of the operation, which requires a period of t
be read to check the value of the Write In Progress (WIP) bit while the SE operation is in progress. The WIP
bit is 1 during the SE operation, and is 0 when the operation is completed. The device internally resets the
Write Enable Latch to 0 before the operation completes (the exact timing is not specified).
The device does not execute an SE command that specifies a sector that is protected by the Block Protect
bits (see
SO/PO[7-0]
11.6.
CS#
SCK
Table 7.1 on page
SI
D a t a
Hi-Z
Mode 3
Mode 0
S h e e t
Figure 11.16 Sector Erase (SE) Command Sequence
13).
0
Table 7.1 on page
1
( P r e l i m i n a r y )
2
Command
S25FL128P
3
4
13) is a valid address for the SE command. CS# must be
5
6
7
MSB
23 22
8
9
24-bit Address
21
10
28
3
29
SE
2
. The Status Register may
30
1
31
0
Figure 11.16
and
33