cs89712 Cirrus Logic, Inc., cs89712 Datasheet - Page 156
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cs89712
Manufacturer Part Number
cs89712
Description
High-performance, Low-power System-on-chip With 10base-t Ethernet Controller
Manufacturer
Cirrus Logic, Inc.
Datasheet
1.CS89712.pdf
(170 pages)
- Current page: 156 of 170
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156
Note:
Note:
tRC1 (REF to REF/ACT command period [refresh]) = 90 ns or 4 cycles at 36 MHz.
tDPL (data in to PRE command period command) = 10 ns or 1 cycle at 36 MHz.
nCAS / nWE
(prech sel)
nRAS /
Bank sel
DQM
CLK
CKE
addr
nCS
A10
DQ
nCAS / nWE
(prech sel)
nRAS /
Bank sel
DQM
CLK
CKE
addr
nCS
A10
DQ
NOP
Figure 28. SDRAM Read Cycles CAS Latency = 3
T0
1 dev
ACT
bank
row
row
NOP
T1
Figure 29. SDRAM Write Cycles
tRCD
NOP
T0
1 dev
ACT
bank
row
row
T2
1 dev
READ NOP
bank
T1
col
tRCD
NOP
T3
tRAS
T2
CAS lat 3
WRITE NOP
1 dev
DO0
bank
T4
col
NOP
T3
tRAS
T5
DO1
tRC
NOP
T4
DI0
T6
NOP
DO2
T5
tRC
NOP
DI1
auto precharge
T7
NOP
DO3
tDPL
T6
NOP
DI2
T8
NOP
auto precharge
T7
NOP
DI3
T9
NOP
tRP
tRP
NOP
(ACT)
T10
NOP
T11
(ACT)
CS89712
DS502PP2
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