mcm63p631 Freescale Semiconductor, Inc, mcm63p631 Datasheet - Page 5

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mcm63p631

Manufacturer Part Number
mcm63p631
Description
64k X 32 Bit Pipelined Burstram Synchronous Fast Static Ram
Manufacturer
Freescale Semiconductor, Inc
Datasheet
NOTES:
MOTOROLA FAST SRAM
TRUTH TABLE
Deselect
Deselect
Deselect
Deselect
Deselect
Begin Read
Begin Read
Continue Read
Continue Read
Continue Read
Continue Read
Suspend Read
Suspend Read
Suspend Read
Suspend Read
Begin Write
Continue Write
Continue Write
Suspend Write
Suspend Write
1. X = Don’t Care. 1 = logic high. 0 = logic low.
2. Write is defined as either 1) any SBx and SW low or 2) SGW is low.
3. G is an asynchronous signal and is not sampled by the clock K. G drives the bus immediately (t GLQX ) following G going low.
4. On write cycles that follow read cycles, G must be negated prior to the start of the write cycle to ensure proper write data setup times. G must
5. This READ assumes the RAM was previously deselected.
Next Cycle
also remain negated at the completion of the write cycle to ensure proper write data hold times.
(See Notes 1 through 5)
Address
External
External
External
Current
Current
Current
Current
Current
Current
Used
None
None
None
None
None
Next
Next
Next
Next
Next
Next
SE1
1
0
0
X
X
0
0
X
X
1
1
X
X
1
1
0
X
1
X
1
SE2
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
0
1
1
1
SE3
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
1
1
0
0
0
ADSP
X
X
X
X
X
X
X
0
0
1
1
0
1
1
1
1
1
1
1
1
ADSC
X
X
X
0
0
0
0
1
1
1
1
1
1
1
1
0
1
1
1
1
ADV
X
X
X
X
X
X
X
0
0
0
0
1
1
1
1
X
0
0
1
1
G 3
X
X
X
X
X
X
X
1
0
1
0
1
0
1
0
X
X
X
X
X
High–Z
High–Z
High–Z
High–Z
High–Z
High–Z
High–Z
High–Z
High–Z
High–Z
High–Z
High–Z
High–Z
High–Z
High–Z
High–Z
DQx
DQ
DQ
DQ
DQ
MCM63P631
Write 2, 4
READ 5
READ 5
WRITE
WRITE
WRITE
WRITE
WRITE
READ
READ
READ
READ
READ
READ
READ
READ
X
X
X
X
X
5

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