ltc4221 Linear Technology Corporation, ltc4221 Datasheet - Page 21

• Manufacturer Part Number: ltc4221
• Description: Dual Hot Swap Controller/power Sequencer With Dual Speed, Dual Level Fault Protection
• Manufacturer: Linear Technology Corporation

I
APPLICATIO S I FOR ATIO
Start-Up Cycle With Current Limit
During a channel start-up cycle, if the inrush current as
according to Equation (12) is large enough to cause a
voltage drop greater than the active current limit threshold
(V
loop controls the operation of the 9.5μA current source at
the GATE pin to regulate the load current to:
The active current limit threshold for channel n has a
component controlled by the voltage at the FB n pin. When
FB n = 0V, V
V
where V
inrush current is controlled by this “foldback” limiting that
tends to keep the power dissipation in the external MOSFET
constant during the start-up cycle.
The timing diagram in Figure 14 illustrates the operation of
the LTC4221 in a channel start-up cycle with limited inrush
RSENSE2
V
V
V
SENSE(ACL)
TIMER
GATE2
V
V
OUT2
SENSE(ACL)
I
ON n
CC n
INRUSH
Figure 14. Channel 2 Start-Up with Current Limit
SENSE(ACL)
RESET
STATE
=
V
SENSE(ACL)
1 2
SENSE(ACL)
) across the sense resistor, an internal servo
increases linearly until FB n reaches 0.5V,
V
SENSE ACL
REGULATED AT
1.9μA
R
0.851V
SENSE
1.234V
TIMING
INITIAL
(t)/R
saturates at 25mV. In this fashion, the
U
(
9.5μA
SENSE
= 9mV. As V
3 4 5 6
)
U
0.4V
CHANNEL 2
START-UP
<9.5μA
V
20μA
TH
7 8 9
OUT n
W
REGULATED AT 25mV/R
and FB n ramp up,
1.234V
NORMAL
CYCLE
9.5μA
0.4V
A
U
DISCHARGE
BY LOAD
4221 F14
SENSE
(13)
current as described by Equation 13. Between time points
5 and 6, the GATE2 pin ramps up with I
time point 6, the inrush current increases enough to trip
V
the inrush current to the level as in Equation 13 by
decreasing I
both V
linearly until it saturates at 25mV at time point 7. At time
point 8, the external MOSFET enters triode operation.
I
V
internal servo loop to control I
channel 2 slow comparator is armed, ending the channel 2
start-up cycle. So if C
point, I
threshold and actions as outlined in the Electronic Circuit
Breaker section. For a successful channel start-up, the
current limited part of the V
8 of Figure 14) must not exceed the sum of start-up cycle
delay as given by Equation 10 and the slow comparator
response time as given by Equation 1. An example of an
unsuccessful start-up is Figure 11 which shows a channel
powering up into an overcurrrent at the load.
The fast comparators of both channels are armed at the
end of the initial timing cycle at time point 4 of Figure 14.
If a short circuit during the start-up cycle overrides the
servo loop and causes V
100mV for more than 1μs, the electronic circuit breaker
trips and the LTC4221 enters the fault state.
Frequency Compensation at Start-Up Cycle
If a channel’s external gate input capacitance (C
greater than 600pF, no external gate capacitor is required
at GATE to stabilize the internal current-limiting loop dur-
ing start-up with current limit. The servo loop that controls
the external MOSFET during current limiting has a unity-
gain frequency of about 105kHz and phase margin of 80°
for external MOSFET gate input capacitances to 2.5nF.
Power MOSFET
Power MOSFETs can be classified by R
drive ratings of 10V, 4.5V, 2.5V and 1.8V. Those rated for
R
maximum rating than those at 4.5V and 2.5V. At low
INRUSH
SENSE(ACL)
GATE2
DS(ON)
GATE2
so I
INRUSH
drops as the ramp rate of V
at 10V V
GATE
(t) and an internal servo loop engages, limiting
GATE
and V
will be subject to the slow comparator
reverts back to 9.5μA. At time point 9, the
GS
(<9.5μA). As a result, the ramp rate of
OUT2
usually have a higher V
LOAD2
decreases and V
RSENSE
OUT
is not fully charged up at this
ramp-up (time points 6 and
of either channel to exceed
INRUSH
OUT2
is disengaged and
DS(ON)
falls below that of
SENSE2
GATE
LTC4221
GS
= 9.5μA. At
at V
increases
absolute
21
GS
ISS
gate
4221fa
) is