nt1gt64u88d0by Nanya Techology, nt1gt64u88d0by Datasheet - Page 12

• Manufacturer Part Number: nt1gt64u88d0by
• Description: 240pin Unbuffered Ddr2 Sdram Module
• Manufacturer: Nanya Techology

NT512T64UH4D0FY / NT1GT64U88D0BY / NT2GT64U8HD0BY
512MB: 64M x 64 / 1GB: 128M x 64 / 2GB: 256M x 64
Unbuffered DDR2 SDRAM DIMM
Serial Presence Detect --
256Mx64 2 RANKs UNBUFFERED DDR2 SDRAM DIMM based on 128Mx8, 8Banks, 8K Refresh, 1.8V DDR2 SDRAMs with SPD
REV 1.0
03/2008
Byte
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
0
1
2
3
4
5
6
7
8
9
Number of Serial PD Bytes Written during Production
Total Number of Bytes in Serial PD device
Fundamental Memory Type
Number of Row Addresses on Assembly
Number of Column Addresses on Assembly
Number of DIMM Ranks
Data Width of Assembly
Reserved
Voltage Interface Level of this Assembly
DDR2 SDRAM Device Cycle Time at CL=5
DDR2 SDRAM Device Access Time from Clock at CL=5
DIMM Configuration Type
Refresh Rate/Type
Primary DDR2 SDRAM Width
Error Checking DDR2 SDRAM Device Width
Reserved
DDR2 SDRAM Device Attributes: Burst Length Supported
DDR2 SDRAM Device Attributes: Number of Device Banks
DDR2 SDRAM Device Attributes: CAS Latencies Supported
DIMM Mechanical Characteristics
DDR2 SDRAM DIMM Type Information
DDR2 SDRAM Module Attributes:
DDR2 SDRAM Device Attributes: General
Minimum Clock Cycle at CL=4
Maximum Data Access Time from Clock at CL=4
Minimum Clock Cycle Time at CL=3
Maximum Data Access Time from Clock at CL=3
Minimum Row Precharge Time (t
Minimum Row Active to Row Active delay (t
Minimum RAS to CAS delay (t
Minimum RAS Pulse Width (t
Module Bank Density
Address and Command Setup Time Before Clock (t
Address and Command Hold Time After Clock (t
Data Input Setup Time Before Clock (t
Data Input Hold Time After Clock (t
Write Recovery Time (t
Internal Write to Read Command delay (t
Internal Read to Precharge delay (t
Reserved
WR
)
Description
RAS
Part 1 of 2 (2GB)
RCD
)
RP
)
DH
)
RTP
)
)
DS
)
WTR
RRD
)
)
IH
)
IS
)
12
NANYA TECHNOLOGY CORP. reserves the right to change Products and Specifications without notice.
0.45ns
0.20ns
0.27ns
0.10ns
0.17ns
3.0ns
3,4,5
3.75ns
0.5ns
5.0ns
0.6ns
2 ranks, Height=30mm
667
-3C
50 ODT, and PASR
Support weak driver,
UDIMM (133.5mm)
SPD Entry Value
Non parity/ECC
15ns
15ns
x ≤ 4.10 (mm)
Normal DIMM
SSTL_1.8V
Undefined
Undefined
Undefined
7.8s/self
15.0ns
DDR2
0.45ns
3.75ns
4,5,6
7.5ns
7.5ns
7.5ns
0.5ns
45.0
1GB
X64
800
-AD
128
256
N/A
4,8
X8
14
10
3ns
8
0.17ns
0.25ns
0.05ns
0.12ns
2.5ns
0.4ns
12.5ns
3.75ns
12.5ns
0.5ns
5.0ns
0.6ns
3,4,5
-AC
800
667
-3C
3D
50
50
60
30
45
20
27
10
17
38
Serial PD Data Entry
(Hexadecimal)
3C
3C
© NANYA TECHNOLOGY CORP.
800
-AD
3D
30
45
50
0E
0A
0C
1E
2D
3C
1E
1E
80
08
08
61
40
00
05
00
82
08
00
00
08
70
01
02
00
07
01
00
25
40
17
25
05
12
-AC
800
3D
32
38
50
50
60
32
Note