nt1gt72u89d0by Nanya Techology, nt1gt72u89d0by Datasheet - Page 7

• Manufacturer Part Number: nt1gt72u89d0by
• Description: 240pin Unbuffered Ddr2 Sdram Module With Ecc Based On 128mx8 Ddr2 Sdram D-die
• Manufacturer: Nanya Techology

NT1GT72U89D0BY / NT2GT72U8PD0BY
1GB: 128M x 72 / 2GB: 256M x 72
Unbuffered DDR2 SDRAM DIMM with ECC
Serial Presence Detect --
128Mx72 1 RANK UNBUFFERED DDR2 SDRAM DIMM based on 128Mx8, 8Banks, 8K Refresh, 1.8V DDR2 SDRAMs with SPD
REV 1.0
03/2008
Byte
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
0
1
2
3
4
5
6
7
8
9
Number of Serial PD Bytes Written during Production
Total Number of Bytes in Serial PD device
Fundamental Memory Type
Number of Row Addresses on Assembly
Number of Column Addresses on Assembly
Number of DIMM Ranks
Data Width of Assembly
Reserved
Voltage Interface Level of this Assembly
DDR2 SDRAM Device Cycle Time at CL=5
DDR2 SDRAM Device Access Time from Clock at CL=5
DIMM Configuration Type
Refresh Rate/Type
Primary DDR2 SDRAM Width
Error Checking DDR2 SDRAM Device Width
Reserved
DDR2 SDRAM Device Attributes: Burst Length Supported
DDR2 SDRAM Device Attributes: Number of Device Banks
DDR2 SDRAM Device Attributes: CAS Latencies Supported
DIMM Mechanical Characteristics
DDR2 SDRAM DIMM Type Information
DDR2 SDRAM Module Attributes:
DDR2 SDRAM Device Attributes: General
Minimum Clock Cycle at CL=4
Maximum Data Access Time from Clock at CL=4
Minimum Clock Cycle Time at CL=3
Maximum Data Access Time from Clock at CL=3
Minimum Row Precharge Time (t
Minimum Row Active to Row Active delay (t
Minimum RAS to CAS delay (t
Minimum RAS Pulse Width (t
Module Bank Density
Address and Command Setup Time Before Clock (t
Address and Command Hold Time After Clock (t
Data Input Setup Time Before Clock (t
Data Input Hold Time After Clock (t
Write Recovery Time (t
Internal Write to Read Command delay (t
Internal Read to Precharge delay (t
Reserved
WR
)
Description
RAS
Part 1 of 2 (1GB)
RCD
)
RP
)
DH
)
RTP
)
)
DS
)
WTR
RRD
)
)
IH
)
IS
)
7
NANYA TECHNOLOGY CORP. reserves the right to change Products and Specifications without notice.
0.175ns
0.45ns
3.75ns
0.20ns
0.27ns
0.10ns
3.0ns
0.5ns
5.0ns
0.6ns
3,4,5
667
-3C
1 rank, Height=30mm
50 ODT, and PASR
Support weak driver,
UDIMM (133.5mm)
SPD Entry Value
15ns
15ns
x ≤ 4.10 (mm)
Normal DIMM
SSTL_1.8V
Undefined
Undefined
Undefined
15.0ns
0.45ns
3.75ns
DDR2
7.8s
7.5ns
7.5ns
7.5ns
3.0ns
0.5ns
45ns
ECC
4,5,6
1GB
X72
128
256
-AD
4,8
800
X8
X8
14
10
8
0.17ns
0.25ns
0.05ns
0.12ns
2.5ns
0.4ns
3.75ns
12.5ns
12.5ns
0.5ns
5.0ns
0.6ns
3,4,5
-AC
800
667
-3C
3D
Serial PD Data Entry
30
45
38
50
50
60
20
27
10
17
(Hexadecimal)
3C
3C
© NANYA TECHNOLOGY CORP.
-AD
800
0E
0A
0C
1E
2D
3C
1E
1E
80
08
08
60
48
00
05
02
82
08
08
00
08
01
02
00
07
01
00
3D
30
45
50
70
25
40
17
25
05
12
800
-AC
3D
50
50
60
32
38
32
Note