nt1gt72u8pb1bd-2c Nanya Techology, nt1gt72u8pb1bd-2c Datasheet - Page 9

• Manufacturer Part Number: nt1gt72u8pb1bd-2c
• Description: 240pin Ddr2 Sdram Fully Buffered Dimm Based On 64mx8 & 128mx4 Ddr2 Sdram - B Die
• Manufacturer: Nanya Techology

NT512T72U89B1BD-2C / NT1GT72U8PB1BD-2C / NT2GT72U4NB1BD-2C
512MB: 64Mx72 / 1GB: 128Mx72 / 2GB: 256Mx72
Serial Presence Detect --
REV 1.0
09/2007
25~26
Byte
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
27
28
29
30
31
32
33
34
35
36
37
38
39
0
1
2
3
4
5
6
7
8
9
Number of Serial PD Bytes Written / SPD Device Size / CRC Coverage
SPD Revision
Key Byte / DRAM Device Type
Voltage Levels of this Assembly
SDRAM Addressing
Module Physical Attributes
Modules Type / Thickness
Module Organization
Fine Timebase Dividend and Divisor
Medium Timebase Dividend
Medium Timebase Divisor
SDRAM Minimum Cycle Time (tCKmin)
SDRAM Maximum Cycle Time (tCKmax)
SDRAM
SDRAM Minimum CAS Latency Time (tCAS)
SDRAM Write Recovery Times Supported
SDRAM Write Recovery Time (tWR)
SDRAM Write Latencies Supported
SDRAM Additive Latencies Supported
SDRAM Minimum
SDRAM Minimum Row Active to Row Active Delay (tRRD)
SDRAM Minimum Row Precharge Time (tRP)
SDRAM Upper Nibbles for tRAS and tRC
SDRAM Minimum Active to Precharge Time (tRAS)
SDRAM Minimum Auto-Refresh to Active/Auto-Refresh Time (tRC)
SDRAM Minimum Auto-Refresh to Active/Auto-Refresh Command Period
(tRFC)
SDRAM Internal Write to Read Command Delay (tWTR)
SDRAM Internal Read to Precharge Command Delay (tRTP)
SDRAM Burst Lengths Supported
SDRAM Terminations Supported
SDRAM Drivers Supported
SDRAM Average Refresh Interval (tREFI)/Double Refresh mode bit/High
Temperature self-refresh rate support indication
Tcasemax / DT4R4W
Thermal resistance of SDRAM device package from top (case0 to ambient
(Psi T-A SDRAM)
DT0: Case temperature rise from ambient due to IDD2N/precharge
operation minus 2.8°C offset temperature
DT2N/DT2Q: Case temperature rise from ambient due to IDD2Q/precharge
quiet standby operation for FBDIMM
DT2P: Case temperature rise from ambient due to IDD2P/precharge
power-down operation
DT3N: Case temperature rise from ambient due to IDD3N/active standby
operation
DT4R: Case temperature rise from ambient due to Page Open Burst
Read/DT4R4W Mode Bit (DT4R/DT4R4W)
Latencies Supported
to
Part 1 of 2
Delay (tRCD)
Description
9
NANYA TECHNOLOGY CORP. reserves the right to change Products and Specifications without notice.
512MB
A401
0A
3C
1E
B4
1E
1E
C2
7A
4C
92
11
09
12
44
23
07
09
52
01
04
20
43
32
42
42
40
32
32
00
F0
03
07
01
53
50
2F
37
27
Serial PD Data Entry
PC2-6400 (-2C)
(Hexadecimal)
A401
1GB
0A
3C
1E
B4
F0
1E
1E
C2
7A
2F
92
11
09
12
44
23
07
11
52
01
04
20
43
32
42
42
40
32
32
00
03
07
01
51
60
35
37
56
© NANYA TECHNOLOGY CORP.
A401
2GB
92
11
09
12
48
23
07
10
52
01
04
0A
20
43
32
42
3C
42
40
32
1E
32
00
B4
F0
1E
1E
03
07
01
C2
51
7A
60
35
37
2F
56