nt1gc72b89a0nl Nanya Techology, nt1gc72b89a0nl Datasheet - Page 26

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nt1gc72b89a0nl

Manufacturer Part Number
nt1gc72b89a0nl
Description
Registered Ddr3 Sdram Dimm
Manufacturer
Nanya Techology
Datasheet
NT1GC72B89A0NL / NT2GC72B8PA0NL
NT4GC72B4NA1NL / NT4GC72B8NA1NL / NT8GTC72B4NA1NL
1GB: 128M x 72 / 2GB: 256M x 72 / 4GB: 512M x 72 / 8GB: 1G x 72
PC3-8500 / PC3-10600
Registered DDR3 SDRAM DIMM
REV 1.1
06/2009
Serial Presence Detect
117-118
119-121
126-127
64-116
34-59
Byte
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
60
61
62
63
0
1
2
3
4
5
6
7
8
9
CRC range, EEPROM bytes, bytes used
SPD revision
DRAM device type
Module type (form factor)
SDRAM Device density and banks
SDRAM device row and column count
Module minimum nominal voltage
Module ranks and device DQ count
ECC tag and module memory Bus width
Fine timebase dividend/divisor (in ps)
Medium timebase dividend
Medium timebase divisor
Minimum SDRAM cycle time (tCKmin)
Reserved
CAS latencies supported
CAS latencies supported
Minimum CAS latency time (tAAmin)
Minimum write recovery time (tWRmin)
Minimum -to- delay (tRCDmin)
Minimum Row Active to Row Active delay (tRRDmin)
Minimum row Precharge delay (tRPmin)
Upper nibble for tRAS and tRC
Minimum Active-to-Precharge delay (tRASmin)
Minimum Active-to-Active/Refresh delay (tRCmin)
Minimum refresh recovery delay (tRFCmin) LSB
Minimum refresh recovery delay (tRFCmin) MSB
Minimum internal Write-to-Read command delay (tWTRmin)
Minimum internal Read-to-Precharge command delay (tRTPmin)
Minimum four active window delay (tFAWmin) LSB
Minimum four active window delay (tFAWmin) MSB
SDRAM device output drivers suported
SDRAM device thermal and refresh options
Module Thermal Sensor
SDRAM Device Type
Reserved
Module height (nominal)
Module thickness (Max)
Raw Card ID reference
DRAM address mapping edge connector
Reserved
Module manufacture ID
Module manufacturer Information
CRC
(Part 1 of 2) [NT4GC72B4NA1NL, 4GB – 2 Ranks, 256Mx4 DDR3 SDRAMs]
Description
Extended Temperature Range,
Front: 3 < thickness ≤ 4 mm,
Back: 3 < thickness ≤ 4 mm,
Standard Monolithic Device
CRC Covers Bytes: 0~116,
Thermal Sensor Support
DLL-Off Mode Support,
29 < height ≦ 30 mm
Total SPD Bytes: 256,
SPD Bytes Used: 176,
(Combo bytes 24,25)
26
14 rows, 11 columns
(Combo byte 28, 29)
Nanya Technology
2 rows, 1 register
With ECC, 64bits
Calculated Value
DDR3 SDRAM
2 ranks, 4 bits
8 banks, 1Gb
Revision 1.0
Raw Card E
Undefined
Undefined
Undefined
Undefined
Undefined
13.125ns
13.125ns
13.125ns
50.625ns
RZQ / 6,
RZQ / 7,
1.875ns
RDIMM
ODTS,
37.5ns
37.5ns
PASR,
110ns
1.5 V
2.5ps
7.5ns
7.5ns
7.5ns
ASR,
6,7,8
15ns
-BE
1ns
8ns
1,1
SPD Entry Value
NANYA reserves the right to change products and specifications without notice.
Extended Temperature Range,
Back: 3 < thickness ≤ 4 mm,
Front: 3 < thickness ≤ 4 mm,
Standard Monolithic Device
CRC Covers Bytes: 0~116,
Thermal Sensor Support
DLL-Off Mode Support,
SPD Bytes Used: 176,
29 < height ≦ 30 mm
Total SPD Bytes: 256,
(Combo bytes 24,25)
14 rows, 11 columns
(Combo byte 28, 29)
Nanya Technology
2 rows, 1 register
Calculated Value
With ECC, 64bits
DDR3 SDRAM
2 ranks, 4 bits
8 banks, 1Gb
Revision 1.0
Raw Card E
Undefined
Undefined
Undefined
Undefined
Undefined
13.125ns
13.125ns
13.125ns
49.125ns
RZQ / 6,
RZQ / 7,
RDIMM
6,7,8,9
ODTS,
PASR,
110ns
2.5ps
1.5ns
7.5ns
7.5ns
1.5 V
ASR,
15ns
36ns
30ns
-CG
1ns
8ns
6ns
1,1
© NANYA TECHNOLOGY CORPORATION
Serial PD Data Entry (Hex.)
830B
D041
-BE
92
10
0B
01
02
12
00
08
0B
52
01
08
0F
00
1C
00
69
78
69
3C
69
11
2C
95
70
03
3C
3C
01
2C
83
8D
80
00
0F
33
04
09
--
--
--
830B
92E8
-CG
0B
0B
0C
3C
3C
3C
8D
92
10
01
02
12
00
08
52
01
08
00
00
69
78
69
30
69
11
20
89
70
03
00
F0
83
80
00
0F
33
04
09
--
--
--

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