s29gl01gs Meet Spansion Inc., s29gl01gs Datasheet - Page 38

• Manufacturer Part Number: s29gl01gs
• Manufacturer: Meet Spansion Inc.

38
5.4.2.2
During the Embedded Erase or blank check algorithms, Data# Polling produces a 0 on DQ7. When the
algorithm is complete, or if the device enters the Erase Suspend mode, Data# Polling produces a '1' on DQ7.
This is analogous to the complement / true datum output described for the Embedded Program algorithm: the
erase function changes all the bits in a sector to '1'; prior to this, the device outputs the complement or '0'. The
system must provide an address within the sector selected for erasure to read valid status information on
DQ7.
After an erase command sequence is written, if the sector selected for erasing is protected, Data# Polling on
DQ7 is active for approximately 100 µs, then the device returns to reading array data.
When the system detects DQ7 has changed from the complement to true data, it can read valid data at
DQ15-DQ0 on the following read cycles. This is because DQ7 may change asynchronously with DQ6-DQ0
while Output Enable (OE#) is asserted Low. This is illustrated in
on page 41
algorithm use in Write Buffer Programming.
Valid DQ7 data polling status may only be read from:
 the address of the last word loaded into the Write Buffer for a Write Buffer programming operation;
 the location of a single word programming operation;
 or a location in a sector being erased or blank checked.
Note:
1. DQ7 should be rechecked even if DQ5 = 1 because DQ7 may change simultaneously with DQ5.
DQ6: Toggle Bit I
Toggle Bit I on DQ6 indicates whether an Embedded Program or Erase algorithm is in progress or complete,
or whether the device has entered the Program Suspend or Erase Suspend mode. Toggle Bit I may be read
at any address, and is valid after the rising edge of the final WE# pulse in the command sequence (prior to the
program or erase operation).
During an Embedded Program or Erase algorithm operation, successive read cycles to any address cause
DQ6 to toggle. (The system may use either OE# or CE# to control the read cycles). When the operation is
complete, DQ6 stops toggling.
After an erase command sequence is written, if the sector selected for erasing is protected, DQ6 toggles for
approximately 100 µs, then the EAC returns to standby (read mode). If the selected sector is not protected,
the Embedded Erase algorithm erases the unprotected sector.
The system can use DQ6 and DQ2 together to determine whether a sector is actively erasing or erase-
suspended. When the device is actively erasing (that is, the Embedded Erase algorithm is in progress), DQ6
shows the outputs for Data# polling on DQ7.
D a t a
GL-S MirrorBit
Figure 5.5 Data# Polling Algorithm
No
S h e e t
Read DQ 7 -DQ0
Read DQ7 -DQ0
®
DQ7 = Data?
DQ7 = Data?
DQ5 = 1?
Family
START
FAIL
No
No
Yes
( P r e l i m i n a r y )
-
Figure 5.2 on page 28
Yes
Yes
Figure 10.15 on page
S29GL_128S_01GS_00_02 March 21, 2011
PASS
shows the Data# polling
81.
Table 5.3