s6b0724 Densitron Corporation, s6b0724 Datasheet - Page 26

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s6b0724

Manufacturer Part Number
s6b0724
Description
132 Seg / 65 Com Driver & Controller For Stn Lcd
Manufacturer
Densitron Corporation
Datasheet

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132 SEG / 65 COM DRIVER & CONTROLLER FOR STN LCD
LCD DISPLAY CIRCUITS
Oscillator
This is completely on-chip oscillator and its frequency is nearly independent of V
the voltage converter and display timing generation circuit. The oscillator circuit is only enabled when MS = "H" and
CLS = "H". When on-chip oscillator is not used, CLS pin must be "L" condition. In this time, external clock must be
input from CL pin
Display Timing Generator Circuit
This circuit generates some signals to be used for displaying LCD. The display clock, CL generated by oscillation
clock, generates a clock to the line counter and a latch signal to the display data latch. The line address of on-chip
RAM is generated in synchronization with the display clock (CL) and the 132-bit display data is latched by the
display data latch circuit in synchronization with the display clock. The display data which is read to the LCD driver is
completely independent of the access to the display data RAM from the microprocessor. The LCD AC signal, M is
generated from the display clock. 2-frame AC driver waveforms with internal timing signal are shown in figure 9.
In a multiple chip configuration, the slave chip requires the M, CL and DISP signals from the master. Table 11 shows
the M, SYNC, CL, and DISP status.
22
Operation mode
Master
Slave
OFF(external clock used)
Table 11. Master and Slave Timing Signal Status
ON (internal clock used)
Oscillator
-
PRELIMINARY SPEC. VER. 1.1
Output
Output
Input
M
DD
. This oscillator signal is used in
Output
Input
Input
CL
Output
Output
DISP
Input
S6B0724

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