fs6370 AMI Semiconductor, Inc., fs6370 Datasheet - Page 20

• Manufacturer Part Number: fs6370
• Description: Fs6370-01g Eeprom Programmable 3-pll Clock Generator Ic
• Manufacturer: AMI Semiconductor, Inc.

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F F S S 6 6 3 3 7 7 0 0 - - 0 0 1 1 / / F F S S 6 6 3 3 7 7 0 0 - - 0 0 1 1 g g E E E E P P R R O O M M P P r r o o g g r r a a m m m m a a b b l l e e 3 3 - - P P L L L L C C l l o o c c k k G G e e n n e e r r a a t t o o r r I I C C
A A M M I I S S e e m m i i c c o o n n d d u u c c t t o o r r - - R R e e v v . . 2 2 . . 0 0 , , M M a a r r . . 0 0 5 5
P P a a r r a a m m e e t t e e r r
Clock Frequency
Bus Free Time Between STOP and START
Set-up Time, START (repeated)
Hold Time, START
Set-up Time, Data Input
Hold Time, Data Input
Output Data Valid From Clock
Rise Time, Data and Clock
Fall Time, Data and Clock
High Time, Clock
Low Time, Clock
Set-up Time, STOP
Table 14: Serial Interface Timing Specifications
SDA
SCL
SDA
SDA
OUT
SCL
IN
t
su:STA
START
t
su:STA
t
hd:STA
t
t
F
hd:STA
t
S S y y m m b b o o l l
f
t
t
t
t
t
t
t
t
t
t
t
AA
SCL
BUF
su:STA
hd:STA
su:DAT
hd:DAT
AA
R
F
HI
LO
su:STO
t
LO
C C o o n n d d i i t t i i o o n n s s / / D D e e s s c c r r i i p p t t i i o o n n
SCL
SDA
SDA
Minimum delay to bridge undefined region of the falling edge of
SCL to avoid unintended START or STOP
SDA, SCL
SDA, SCL
SCL
SCL
ADDRESS OR
DATA VALID
Figure 13: Data Transfer Sequence
Figure 12: Bus Timing Data
t
HI
t
hd:DAT
20
t
DATA CAN
AA
CHANGE
t
su:DAT
M M i i n n . .
S S t t a a n n d d a a r r d d M M o o d d e e
250
4.7
4.7
4.0
4.0
4.7
4.0
0
0
t
su:STO
M M a a x x . .
1000
100
300
3.5
STOP
t
su:STO
t
R
U U n n i i t t s s
kHz
ms
ms
ms
ms
ms
ms
ms
ms
ns
ns
ns
t
BUF
Data Sheet