mbm29dl324te90tr Meet Spansion Inc., mbm29dl324te90tr Datasheet - Page 51

• Manufacturer Part Number: mbm29dl324te90tr
• Description: 32 M 4 M ? 8/2 M ? 16 Bit Dual Operation Flash Memory
• Manufacturer: Meet Spansion Inc.

*1 : Successive reads from the erasing or erase-suspend sector will cause DQ
*2 : Reading from the non-erase suspend sector address will indicate logic “1” at the DQ
Program
Erase
Erase-Suspend Read
Erase-Suspend Program
(Erase-Suspended Sector)
Reading Toggle Bits DQ
Whenever the system initially begins reading toggle bit status, it must read DQ
to determine whether a toggle bit is toggling. Typically a system would note and store the value of the toggle bit
after the first read. After the second read, the system would compare the new value of the toggle bit with the
first. If the toggle bit is not toggling, the device has completed the program or erase operation. The system can
read array data on DQ
However, if, after the initial two read cycles, the system determines that the toggle bit is still toggling, the system
also should note whether the value of DQ
determine again whether the toggle bit is toggling, since the toggle bit may have stopped toggling just as DQ
went high. If the toggle bit is no longer toggling, the device has successfully completed the program or erase
operation. If it is still toggling, the device did not complete the operation successfully, and the system must write
the reset command to return to reading array data.
The remaining scenario is that the system initially determines that the toggle bit is toggling and DQ
gone high. The system may continue to monitor the toggle bit and DQ
mining the status as described in the previous paragraph. Alternatively, it may choose to perform other system
tasks. In this case, the system must start at the begining of the algorithm when it returns to determine the status
of the operation. (Refer to “Toggle Bit Algorithm” in “■ FLOW CHART”.)
• RY/BY
The MBM29DL32XTE/BE provide a RY/BY open-drain output pin as a way to indicate to the host system that
the Embedded Algorithms are either in progress or has been completed. If the output is low, the devices are
busy with either a program or erase operation. If the output is high, the devices are ready to accept any read/
write or erase operation. If the MBM29DL32XTE/BE are placed in an Erase Suspend mode, the RY/BY output
will be high.
During programming, the RY/BY pin is driven low after the rising edge of the fourth write pulse. During an erase
operation, the RY/BY pin is driven low after the rising edge of the sixth write pulse. The RY/BY pin will indicate
a busy condition during the RESET pulse. Refer to “RY/BY Timing Diagram during Program/Erase Operations”
and “RESET, RY/BY Timing Diagram” for a detailed timing diagram. The RY/BY pin is pulled high in standby
mode.
Since this is an open-drain output, the pull-up resistor needs to be connected to V
be connected to the host system via more than one RY/BY pin in parallel.
Ready/Busy
Mode
7
to DQ
6
/DQ
0
2
on the following read cycle.
Retired Product DS05-20881-8E_July 20, 2007
5
DQ
DQ
DQ
is high (see the section on DQ
Toggle Bit Status
0
1
7
7
7
MBM29DL32XTE/BE
Toggle
Toggle
Toggle
DQ
5
1
through successive read cycles, deter-
6
5
2
) . If it is, the system should then
to toggle.
7
to DQ
CC
; multiples of devices may
2
0
bit.
at least twice in a row
Toggle*
Toggle
DQ
1*
1
2
2
1
5
has not
80 / 90
5
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