mbm29dl324te90tr Meet Spansion Inc., mbm29dl324te90tr Datasheet - Page 52

• Manufacturer Part Number: mbm29dl324te90tr
• Description: 32 M 4 M ? 8/2 M ? 16 Bit Dual Operation Flash Memory
• Manufacturer: Meet Spansion Inc.

52
MBM29DL32XTE/BE
• Data Protection
The MBM29DL32XTE/BE are designed to offer protection against accidental erasure or programming caused
by spurious system level signals that may exist during power transitions. During power up the devices automat-
ically reset the internal state machine in the Read mode. Also, with its control register architecture, alteration of
the memory contents only occurs after successful completion of specific multi-bus cycle command sequences.
The devices also incorporate several features to prevent inadvertent write cycles resulting form V
and power-down transitions or system noise.
• Low V
To avoid initiation of a write cycle during V
than V
disabled. Under this condition the device will reset to the read mode. Subsequent writes will be ignored until the
V
prevent unintentional writes when V
If Embedded Erase Algorithm is interrupted, there is possibility that the erasing sector (s) cannot be used.
• Write Pulse “Glitch” Protection
Noise pulses of less than 3 ns (typical) on OE, CE, or WE will not initiate a write cycle.
• Logical Inhibit
Writing is inhibited by holding any one of OE = V
must be a logical zero while OE is a logical one.
• Power-Up Write Inhibit
Power-up of the devices with WE = CE = V
The internal state machine is automatically reset to the read mode on power-up.
• Sector Group Protection
Device user is able to protect each sector group individually to store and protect data. Protection circuit voids
both write and erase commands that are addressed to protected sectors.
Any commands to write or erase addressed to protected sector are ignored (see “■ FUNCTIONAL DESCRIP-
TION Sector Group Protection”)
CC
level is greater than V
LKO
CC
(Min) . If V
Write Inhibit
CC
< V
LKO
LKO
. It is the users responsibility to ensure that the control pins are logically correct to
, the command register is disabled and all internal program/erase circuits are
CC
Retired Product DS05-20881-8E_July 20, 2007
is above V
80 / 90
CC
IL
and OE = V
power-up and power-down, a write cycle is locked out for V
LKO
IL
, CE = V
(Min) .
IH
will not accept commands on the rising edge of WE.
IH
, or WE = V
IH
. To initiate a write cycle CE and WE
CC
power-up
CC
less