mt48h8m16lf Micron Semiconductor Products, mt48h8m16lf Datasheet - Page 33
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mt48h8m16lf
Manufacturer Part Number
mt48h8m16lf
Description
128mb 8 Meg X 16, 4 Meg X 32 Mobile Sdram
Manufacturer
Micron Semiconductor Products
Datasheet
1.MT48H8M16LF.pdf
(74 pages)
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Figure 12:
PDF: 09005aef832ff1ea / Source: 09005aef832ff1ac
sdr_mobile_sdram_cmd_op_timing_dia_fr5.08__4.fm - Rev. B 6/08 EN
Command
BA0, BA1
Address
DQM
CKE
A10
CLK
DQ
1
Power-up:
V
CLK stable
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Initialize and Load Mode Register
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T = 100μs
and
Notes:
t
CMS
t
CKS
T0
NOP
t
t
High-Z
CKH
CMH
2. NOPs or DESELECTs must only be provided during
3. NOPs or DESELECTs must only be provided during
When in the idle state, two AUTO REFRESH cycles must be performed. After the AUTO
REFRESH cycles are complete, the SDRAM is ready for mode register programming.
Because the mode register powers up in an unknown state, it should be loaded prior to
applying any operational command. The low-power SDRAM initialization sequence is
shown in Figure 12.
1. PRE = PRECHARGE command, AR = AUTO REFRESH command, LMR = LOAD MODE REGISTER
t
CK
command.
ALL BANKS
t
Precharge
AS
all banks
PRE
T1
t AH
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Tn + 1
AR
128Mb: 8 Meg x 16, 4 Meg x 32 Mobile SDRAM
t
33
RFC
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2
To + 1
AR
Micron Technology, Inc., reserves the right to change products or specifications without notice.
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2
t AS t AH
t
Load mode
AS
BA0 = L,
BA1 = L
t
t
Tp + 1
register
Code
LMR
Code
RFC time.
MRD time.
t
AH
t
MRD
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Load extended
mode register
3
©2008 Micron Technology, Inc. All rights reserved.
BA0 = L,
BA1 = H
BA0 = L,
BA1 = L
Code
Tq + 1
Code
LMR
t
MRD
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Initialization
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3
Valid
Don’t Care
Preliminary
Tr + 1
Valid
Valid
Valid
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