mt45w8mw16bgx Micron Semiconductor Products, mt45w8mw16bgx Datasheet - Page 57

• Manufacturer Part Number: mt45w8mw16bgx
• Description: 128mb 8 Meg X 16 Async/page/burst Cellularram 1.5 Async/ Page/burst Cellularram 1.5 Memory
• Manufacturer: Micron Semiconductor Products

Figure 45:
PDF: 09005aef80ec6f79/Source: 09005aef80ec6f65
128mb_burst_cr1_5_p26z__2.fm - Rev. H 9/07 EN
DQ[15:0]
LB#/UB#
A[22:0]
ADV#
WAIT
WE#
OE#
CLK
CE#
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
IH
IL
IH
IL
IH
IL
IH
IL
IH
IL
IH
IL
IH
IL
OH
OL
IH
IL
Burst WRITE at End of Row (Wrap Off)
Notes:
t CLK
Valid Input
t SP
1. Non-default BCR settings for burst WRITE at end of row: fixed or variable latency; WAIT
2. For burst WRITEs, CE# must go HIGH before the third CLK after the WAIT period begins
3. Devices from different CellularRAM vendors can assert WAIT so that the end-of-row data is
4. Micron devices are fully compatible with the CellularRAM Workgroup specification that
active LOW; WAIT asserted during delay.
(before the third CLK after WAIT asserts with BCR[8] = 0, or before the fourth CLK after
WAIT asserts with BCR[8] = 1).
input one cycle before the WAIT period begins (as shown, solid line), or the same cycle that
asserts WAIT. This difference in behavior will not be noticed by controllers that monitor
WAIT, or that use WAIT to abort on an end-of-row condition.
requires CE# to go HIGH one cycle sooner than shown here.
t HD
Valid Input
128Mb: 8 Meg x 16 Async/Page/Burst CellularRAM 1.5 Async/
End of row
(A[6:0] = 7Fh)
t HZ
t KHTL
Note 3
Note 2
57
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Page/Burst CellularRAM 1.5 Memory
t HZ
©2004 Micron Technology, Inc. All rights reserved.
High-Z
Don’t Care