ics8430ay62l Integrated Device Technology, ics8430ay62l Datasheet

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ics8430ay62l

Manufacturer Part Number
ics8430ay62l
Description
Ics8430-62 500mhz, Crystal-to-3.3v, 2.5v Differential Lvpecl Frequency Synthesizer
Manufacturer
Integrated Device Technology
Datasheet
General Description
REF_CLK or crystal inputs. The VCO operates at a frequency range
of 250MHz to 500MHz. The VCO frequency is programmed in steps
equal to the value of the input reference or crystal frequency. The
VCO and output frequency can be programmed using the serial or
parallel interfaces to the configuration logic. Frequency steps as
small as 1MHz can be achieved using a 16MHz crystal or REF_CLK.
Block Diagram
ICS8430AY-62 REVISION A JULY 2, 2009
XTAL_SEL
HiPerClockS™
VCO_SEL
S_CLOCK
REF_CLK
nP_LOAD
ICS
S_LOAD
S_DATA
M0:M8
XTAL_OUT
N0:N2
XTAL_IN
MR
Pullup
Pullup
Pulldown
Pulldown
Pulldown
Pulldown
Pulldown
Pulldown
9
3
The ICS8430-62 is a general purpose, dual output
Crystal-to-3.3V, 2.5V Differential LVPECL High
Frequency Synthesizer and a member of the
HiPerClockS™ family of High Performance Clock
Solutions from IDT. The ICS8430-62 has a selectable
OSC
Phase Detector
500MHz, Crystal-to-3.3V, 2.5V
Differential LVPECL Frequency Synthesizer
0
1
÷M
÷16
Interface Logic
Configuration
VCO
PLL
0
1
÷1.5
÷12
÷1
÷2
÷3
÷4
÷6
÷8
FOUT0
nFOUT0
FOUT1
nFOUT1
TEST
1
Features
Dual differential 3.3V or 2.5V LVPECL outputs
Selectable crystal oscillator interface or LVCMOS/LVTTL
REF_CLK
Output frequency range: 20.83MHz to 500MHz
Crystal input frequency range: 14MHz to 27MHz
VCO range: 250MHz to 500MHz
Parallel or serial interface for programming counter
and output dividers
RMS period jitter: 5ps (maximum)
Cycle-to-cycle jitter: 35ps (maximum)
Full 3.3V or 3.3V core/2.5V output supply
0°C to 70°C ambient operating temperature
Available in both standard (RoHS 5) and lead-free (RoHS 6)
packages
7mm x 7mm x 1.4mm package body
Pin Assignment
V
M6
M5
M7
M8
N0
N1
N2
EE
1
2
3
4
5
6
7
8
32 31 30 29 28 27 26 25
9
10 11 12 13 14 15 16
32 Lead LQFP
ICS8430-62
Y Package
Top View
©2009 Integrated Device Technology, Inc.
ICS8430-62
24
23
22
21
20
19
18
17
REF_CLK
S_LOAD
S_DATA
XTAL_OUT
XTAL_SEL
V
S_CLOCK
MR
CCA
DATASHEET

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ics8430ay62l Summary of contents

Page 1

... ICS8430-62 32 Lead LQFP 7mm x 7mm x 1.4mm package body Y Package Top View ©2009 Integrated Device Technology, Inc. DATASHEET XTAL_OUT REF_CLK XTAL_SEL V CCA S_LOAD S_DATA S_CLOCK MR ...

Page 2

... S L ERIAL OADING ARALLEL OADING Time TEST Output 0 LOW 1 S_DATA, Shift Register Input 0 Output of M Divider 1 Do Not Use ©2009 Integrated Device Technology, Inc ...

Page 3

... N2:N0 sets the N output divider value. LVCMOS/LVTTL interface levels. Determines whether synthesizer is in PLL or bypass mode. When LOW, Input Pullup synthesizer is in bypass mode, when HIGH,synthesizer is in PLL mode. LVCMOS/LVTTL interface levels. Test Conditions 3 Minimum Typical Maximum ©2009 Integrated Device Technology, Inc. Units pF Ω k Ω k ...

Page 4

... S_DATA passed directly to M divider clocked • • • • • • ©2009 Integrated Device Technology, Inc • • • • ...

Page 5

... CCO Test Conditions Minimum 3.135 V CC 3.135 2.375 5 Output Frequency (MHz) Minimum Maximum 250 500 166.66 333.33 125 250 83.33 166.66 62.5 125 41.66 83.33 31.25 62.5 20.83 41.66 = 0°C to 70°C A Typical Maximum 3.3 3.465 – 0.14 3 3.3 3.465 2.5 2.625 130 14 ©2009 Integrated Device Technology, Inc. Units ...

Page 6

... IN 2.6 1.8 = 0°C to 70°C Minimum Typical V – 1.4 CCO V – 2.0 CCO 0.6 = 0°C to 70°C A Minimum Typical V – 1.4 CCO V – 2.0 CCO 0.4 ©2009 Integrated Device Technology, Inc. Maximum Units 0.8 V 150 µA 5 µA µA µ 0.5 V Maximum Units V – 0.9 µA CCO V – ...

Page 7

... CRYSTAL-TO-3.3V, 2.5V DIFFERENTIAL LVPECL FREQUENCY SYNTHESIZER = 3.3V±5 3.3V±5% or 2.5V±5 CCO Test Conditions Test Conditions 7 = 0°C to 70°C A Minimum Typical Maximum Minimum Typical Maximum Fundamental ©2009 Integrated Device Technology, Inc. Units MHz MHz MHz Units MHz Ω pF ...

Page 8

... CC CCO A Test Conditions N ≠ 1 1.5 N ≠ 1.5 20% to 80% Even N Dividers Odd N Dividers 8 Minimum Typical Maximum 20.83 500 35 200 5 20 200 700 ©2009 Integrated Device Technology, Inc. Units MHz ...

Page 9

... T CC CCO Test Conditions N ≠ 1 1.5 N ≠ 1.5 20% to 80% Even N Dividers Odd N Dividers 9 = 0°C to 70°C A Minimum Typical 20.83 200 ©2009 Integrated Device Technology, Inc. Maximum Units 500 MHz 35 ps 200 700 ...

Page 10

... Reference Point (Trigger Edge) nFOUTx FOUTx PERIOD t PW odc = t PERIOD ©2009 Integrated Device Technology, Inc. SCOPE Qx nQx REF V OL Histogram Mean Period (First edge after trigger) x 100% ...

Page 11

... CRYSTAL-TO-3.3V, 2.5V DIFFERENTIAL LVPECL FREQUENCY SYNTHESIZER 80 20 and V CC, CCA CCO pin and also shows that CC pin. The 10Ω resistor can CCA 11 3. .01µF 10Ω V CCA .01µF 10µF Figure 2. Power Supply Filtering ©2009 Integrated Device Technology, Inc. ...

Page 12

... This can be done in one of two ways. First, R1 and R2 in parallel should equal the transmission line impedance. For most 50Ω applications, R1 and R2 can be 100Ω. This can also be accomplished by removing R1 and making R2 50Ω 0.1µf XTAL_IN R2 XTAL_OUT 12 ©2009 Integrated Device Technology, Inc. ...

Page 13

... Input R2 50Ω RTT Figure 5B. 3.3V LVPECL Output Termination 13 3. 125Ω 125Ω 50Ω LVPECL Z = 50Ω 84Ω 84Ω ©2009 Integrated Device Technology, Inc. 3.3V Input ...

Page 14

... The R3 in Figure 6B can be eliminated and the termination is shown in Figure 6C. – very close to ground 2.5V 2.5V R3 250 + – 62.5 62.5 Figure 6B. 2.5V LVPECL Driver Termination Example 2.5V + – 2.5V CC 50Ω 50Ω 2.5V LVPECL Driver R1 50 ©2009 Integrated Device Technology, Inc. 2.5V + – ...

Page 15

... XTAL_OUT REF_CLK XTAL_SEL VCCA S_LOAD S_DATA S_CLOCK 8 17 VEE MR VCC C14 0.1u C15 0. VCC R7 10 VCCA C11 C16 0.01u 10u VCC R1 R3 125 125 Ohm Ohm ©2009 Integrated Device Technology, Inc ...

Page 16

... Any via on the trace can affect the trace characteristic impedance and hence degrade signal quality. parallel with the clock traces. If running parallel traces is unavoidable, allow more space between the clock trace and the other signal trace. clock trace pair. ©2009 Integrated Device Technology, Inc. ...

Page 17

... CRYSTAL-TO-3.3V, 2.5V DIFFERENTIAL LVPECL FREQUENCY SYNTHESIZER = 3. 3.465V, which gives worst case results 3.465V * 130mA = 450.45mW EE_MAX * Pd_total + for 32 Lead LQFP, Forced Convection θ by Velocity JA 0 65.7°C/W 17 must be used. Assuming no air flow and JA 1 2.5 55.9°C/W 52.4°C/W ©2009 Integrated Device Technology, Inc. ...

Page 18

... CRYSTAL-TO-3.3V, 2.5V DIFFERENTIAL LVPECL FREQUENCY SYNTHESIZER V OUT RL 50Ω – 0.9V CCO_MAX = V – 1.7V CCO_MAX ] * (V – [(2V – CCO_MAX OH_MAX ] * (V – [(2V – CCO_MAX OL_MAX 18 – V ))/ CCO_MAX OH_MAX L CCO_MAX – V ))/ CCO_MAX OL_MAX L] CCO_MAX ©2009 Integrated Device Technology, Inc. – OH_MAX – OL_MAX ...

Page 19

... Air Flow Table for a 32 Lead LQFP JA Meters per Second Multi-Layer PCB, JEDEC Standard Test Boards Transistor Count The transistor count for ICS8430-62 is: 4258 ICS8430AY-62 REVISION A JULY 2, 2009 500MHz CRYSTAL-TO-3.3V, 2.5V DIFFERENTIAL LVPECL FREQUENCY SYNTHESIZER θ vs. Air Flow 65.7°C/W 55.9°C/W 19 2.5 52.4°C/W ©2009 Integrated Device Technology, Inc. ...

Page 20

... All Dimensions in Millimeters Symbol Minimum Nominal 0.05 0.10 A2 1.35 1.40 b 0.30 0.37 c 0.09 D & E 9.00 Basic D1 & E1 7.00 Basic D2 & E2 5.60 Ref. e 0.80 Basic L 0.45 0.60 θ 0° ccc Reference Document: JEDEC Publication 95, MS-026 ICS8430AY-62 REVISION A JULY 2, 2009 500MHz CRYSTAL-TO-3.3V, 2.5V DIFFERENTIAL LVPECL FREQUENCY SYNTHESIZER Maximum 1.60 0.15 1.45 0.45 0.20 0.75 7° 0.10 20 ©2009 Integrated Device Technology, Inc. ...

Page 21

... ICS8430AY62L 8430AY-62LFT ICS8430AY62L NOTE: Parts that are ordered with an "LF" suffix to the part number are the Pb-Free configuration and are RoHS compliant. While the information presented herein has been checked for both accuracy and reliability, Integrated Device Technology (IDT) assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use ...

Page 22

... ICS8430-62 Datasheet Revision History Sheet Rev Table Page Description of Change A 1 Block Diagram - output labels were cut-off. ICS8430AY-62 REVISION A JULY 2, 2009 500MHz CRYSTAL-TO-3.3V, 2.5V DIFFERENTIAL LVPECL FREQUENCY SYNTHESIZER 22 Date 7/2/09 ©2009 Integrated Device Technology, Inc. ...

Page 23

... IDT. Integrated Device Technology, IDT and the IDT logo are registered trademarks of IDT. Other trademarks and service marks used herein, including protected names, logos and designs, are the property of IDT or their respective third party owners ...

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