ics87931i-147 Integrated Device Technology, ics87931i-147 Datasheet - Page 9

• Manufacturer Part Number: ics87931i-147
• Description: Low Skew, 1-to-6 Lvcmos/lvttl Clock Multiplier/zero Delay Buffer
• Manufacturer: Integrated Device Technology

D
The CLK /nCLK accepts LVDS, LVPECL, LVHSTL, SSTL, HCSL
and other differential signals. The signals must meet the V
V
for the HiPerClockS CLK/nCLK input driven by the most common
driver types. The input interfaces suggested here are examples
IDT
F
F
CMR
IGURE
IGURE
IFFERENTIAL
ICS87931I-147
LOW SKEW, 1-TO-6 LVCMOS/LVTTL CLOCK MULTIPLIER/ZERO DELAY BUFFER
™
input requirements. Figures 3A to 3D show interface examples
/ ICS
3.3V
3A. H
3C. H
™
1.8V
LVCMOS CLOCK MULTIPLIER/ZERO DELAY BUFFER
LVPECL
LVHSTL
ICS
HiPerClockS
LVHSTL Driver
IDT H
3.3V LVPECL D
I
I
P
P
C
ER
ER
LOCK
Zo = 50 Ohm
Zo = 50 Ohm
C
C
Zo = 50 Ohm
Zo = 50 Ohm
I
P
LOCK
LOCK
ER
I
C
NPUT
S CLK/nCLK I
LOCK
S CLK/nCLK I
S LVHSTL D
RIVER
I
R1
50
3.3V
R3
125
NTERFACE
R1
84
R2
50
R4
125
R2
84
CLK
nCLK
NPUT
CLK
nCLK
NPUT
3.3V
3.3V
RIVER
HiPerClockS
Input
HiPerClockS
Input
D
D
RIVEN BY
RIVEN BY
PP
and
9
only. Please consult with the vendor of the driver component to
confirm the driver termination requirements. For example in Figure
3A, the input termination applies for IDT HiPerClockS LVHSTL
drivers. If you are using an LVHSTL driver from another vendor,
use their termination recommendation.
F
F
IGURE
IGURE
3.3V
3.3V
3B. H
3D. H
LVDS_Driv er
LVPECL
3.3V LVPECL D
3.3V LVDS D
I
I
P
P
Zo = 50 Ohm
Zo = 50 Ohm
ER
ER
C
C
LOCK
LOCK
Zo = 50 Ohm
Zo = 50 Ohm
ICS87931AYI-147 REV. A MARCH 29, 2007
S CLK/nCLK I
S CLK/nCLK I
RIVER
R1
50
RIVER
R3
50
R2
50
R1
100
CLK
nCLK
3.3V
NPUT
NPUT
HiPerClockS
Input
CLK
nCLK
D
D
3.3V
RIVEN BY
RIVEN BY
Receiv er