ics1893ck-40 Integrated Device Technology, ics1893ck-40 Datasheet - Page 80
ics1893ck-40
Manufacturer Part Number
ics1893ck-40
Description
3.3-v 10base-t/100base-tx Integrated Phyceiver
Manufacturer
Integrated Device Technology
Datasheet
1.ICS1893CK-40.pdf
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7.13.8 Link Loss Inhibit (bit 18.1)
7.13.9 Squelch Inhibit (bit 18.0)
ICS1893CK-40, Rev. C, 06/02/09
2. This bit is a control bit and not a status bit. Therefore, it is not updated to indicate this automatic
The Link Loss Inhibit bit allows an STA to prevent the ICS1893CK-40 from dropping the link in 10Base-T
mode. When an STA sets this bit to logic:
•
•
The Squelch Inhibit bit allows an STA to control the ICS1893CK-40 Squelch Detection in 10Base-T mode.
When an STA sets this bit to logic:
•
•
Zero, the state machine behaves normally and the link status is based on the signaling detected Twisted-
Pair Receiver inputs.
One, the ICS1893CK-40 10Base-T Link Integrity Test state machine is forced into the ‘Link Passed’ state
regardless of the Twisted-Pair Receiver input conditions.
Zero, before the ICS1893CK-40 can establish a valid link, the ICS1893CK-40 must receive valid
10Base-T data.
One, before the ICS1893CK-40 can establish a valid link, the ICS1893CK-40 must receive both valid
10Base-T data followed by an IDL.
inhibiting of the SQE test in full-duplex mode or repeater mode.
ICS1893CK-40 Data Sheet - Release
Copyright © 2009, Integrated Device Technology, Inc.
All rights reserved.
80
Chapter 7 Management Register Set
June 2009
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