w83194br-655 Winbond Electronics Corp America, w83194br-655 Datasheet - Page 13

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w83194br-655

Manufacturer Part Number
w83194br-655
Description
Clock For Sis Chipsets Winbond Clock Generator
Manufacturer
Winbond Electronics Corp America
Datasheet
7.3
7.4
7.5
BIT
BIT
BIT
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
Register 2: PCI, ZCLK Control (1 = Enable, 0 = Stopped) (Default: FFh)
Register 3: PCI, AGP Control (1 = Enable, 0 = Stopped) (Default: EFh)
Register 4: 48MHz, REF, SRC Control (1 = Enable, 0 = Stopped) (Default: FFh)
SEL12_48
PIN NO
PIN NO
PIN NO
47,46
15
14
22
21
12
22
21
20
17
16
30
31
26
27
25
3
2
-
-
-
-
-
PWD
PWD
PWD
X
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Reserved
PCI_F1 output control
PCI_F0 output control
ZCLK1 output control
ZCLK0 output control
PCI5 output control
PCI4 output control
PCI3 output control
PCI2 output control
PCI1 output control
PCI0 output control
12 _ 48 MHz output selection, 1: 12 MHz. 0: 48 MHz. (default)
Default value follow hardware trapping data on SEL12_48# pin.
Reserved
Reserved
AGP1 output control
AGP0 output control
24_48MHz output control
12_48MHz output control
48MHz output control
Reserved
REF1 output control
REF0 output control
SRC output control
Reserved
W83194BR-655/W83194BG-655
- 9 -
DESCRIPTION
DESCRIPTION
DESCRIPTION
Publication Release Date: February 14, 2006
Revision 1.0

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