w83194br-655 Winbond Electronics Corp America, w83194br-655 Datasheet - Page 17

• Manufacturer Part Number: w83194br-655
• Description: Clock For Sis Chipsets Winbond Clock Generator
• Manufacturer: Winbond Electronics Corp America

Table-2 CPU, ZCLK, divider ratio selection Table
7.14 Register 13: M/N Control (Default: 0Ah)
Bit2/
Bit4/
Bit9
BIT
7
6
5
4
3
2
1
0
EN_MN_PROG
NVAL<10>
DIVM_P1
DIVM_P0
IVAL<3>
IVAL<2>
IVAL<1>
IVAL<0>
MSB
LSB
NAME
0
1
PWD
X
X
X
X
X
0
0
0
Div3
Div5
0
0: Output frequency depend on frequency table
1: Program all clock frequency by changing M/N value
The equation is
Once the watchdog timer timeout, the bit will be clear. Then
the frequency will be decided by hardware default FS<4:0>
or desired
EN_SAFE_FREQ (Reg0 - bit 7).
Programmable N divisor bit 10.
Variable accumulation period for M divisor. Depend
On VCO Frequency.
00: 400M
10: 667M
Charge pump current selection
VCO =14.318MHz*(N+4)/ M.
ZCLK
BIT5
Div4
Div6
frequency select SAF_FREQ [4:0] depend on
1
W83194BR-655/W83194BG-655
- 13 -
Div2
Div6
00
DESCRIPTION
Publication Release Date: February 14, 2006
Div3
Div8
01
01: 533M
11: 800M
BIT1, 0
CPU
Div4
Div8
10
Revision 1.0
Div5
Div8
11